drm/vc4: Correct DSI divider calculations

The divider calculations tried to find the divider
just faster than the clock requested. However if
it required a divider of 7 then the for loop
aborted without handling the "error" case, and could
end up with a clock lower than requested.

Correct the loop so that we always have a clock greater
than requested.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c
index c8ae461..9e349ba 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_dsi.c
+++ b/drivers/gpu/drm/vc4/vc4_dsi.c
@@ -850,11 +850,9 @@ static bool vc4_dsi_encoder_mode_fixup(struct drm_encoder *encoder,
        /* Find what divider gets us a faster clock than the requested
         * pixel clock.
         */
-       for (divider = 1; divider < 8; divider++) {
-               if (parent_rate / divider < pll_clock) {
-                       divider--;
+       for (divider = 1; divider < 7; divider++) {
+               if (parent_rate / (divider + 1) < pll_clock)
                        break;
-               }
        }
 
        /* Now that we've picked a PLL divider, calculate back to its