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perf/x86/msr: Add Granite Rapids
author
Kan Liang
<kan.liang@linux.intel.com>
Tue, 14 Mar 2023 17:00:40 +0000
(10:00 -0700)
committer
Peter Zijlstra
<peterz@infradead.org>
Tue, 21 Mar 2023 13:43:08 +0000
(14:43 +0100)
The same as Sapphire Rapids, the SMI_COUNT MSR is also supported on
Granite Rapids. Add Granite Rapids model.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link:
https://lore.kernel.org/r/20230314170041.2967712-2-kan.liang@linux.intel.com
arch/x86/events/msr.c
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diff --git
a/arch/x86/events/msr.c
b/arch/x86/events/msr.c
index
c65d890
..
0feaaa5
100644
(file)
--- a/
arch/x86/events/msr.c
+++ b/
arch/x86/events/msr.c
@@
-70,6
+70,8
@@
static bool test_intel(int idx, void *data)
case INTEL_FAM6_BROADWELL_X:
case INTEL_FAM6_SAPPHIRERAPIDS_X:
case INTEL_FAM6_EMERALDRAPIDS_X:
+ case INTEL_FAM6_GRANITERAPIDS_X:
+ case INTEL_FAM6_GRANITERAPIDS_D:
case INTEL_FAM6_ATOM_SILVERMONT:
case INTEL_FAM6_ATOM_SILVERMONT_D: