re PR target/37571 (Performance regression due to compare/branch fuse optimization)

2008-09-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/37571
	* config/i386/i386.md (*jcc_fused_1): Removed.
	(*jcc_fused_2): Likewise.
	(*jcc_fused_3): Likewise.
	(*jcc_fused_4): Likewise.

From-SVN: r140514

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9e866f5..0727302 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2008-09-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/37571
+       * config/i386/i386.md (*jcc_fused_1): Removed.
+       (*jcc_fused_2): Likewise.
+       (*jcc_fused_3): Likewise.
+       (*jcc_fused_4): Likewise.
+
 2008-09-20  Richard Sandiford  <rdsandiford@googlemail.com>
 
        * doc/tm.texi (TARGET_IRA_COVER_CLASSES): Define.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 66d1866..de58df3 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -14267,76 +14267,6 @@
             (const_int 2)
             (const_int 6)))])
 
-;; ??? Handle alignment requirements for compare and branch fused macro-op;
-;; the branch instruction does not start at a 16-byte boundary or cross
-;; a 16-byte boundary.
-
-(define_insn "*jcc_fused_1"
-  [(set (pc)
-       (if_then_else (match_operator 1 "comparison_operator"
-                       [(match_operand:SWI32 2 "register_operand" "<r>")
-                        (match_operand:SWI32 3 "const0_operand" "")])
-        (label_ref (match_operand 0 "" ""))
-        (pc)))]
-  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT"
-{
-  return "test{<imodesuffix>}\t%2, %2\n\t"
-        "%+j%E1\t%l0\t" ASM_COMMENT_START " fused";
-}
-  [(set_attr "type" "multi")
-   (set_attr "mode" "<MODE>")])
-
-(define_insn "*jcc_fused_2"
-  [(set (pc)
-       (if_then_else (match_operator 1 "comparison_operator"
-                       [(match_operand:SWI32 2 "register_operand" "<r>")
-                        (match_operand:SWI32 3 "const0_operand" "")])
-        (pc)
-        (label_ref (match_operand 0 "" ""))))]
-  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT"
-{
-  return "test{<imodesuffix>}\t%2, %2\n\t"
-        "%+j%e1\t%l0\t" ASM_COMMENT_START " fused";
-}
-  [(set_attr "type" "multi")
-   (set_attr "mode" "<MODE>")])
-
-(define_insn "*jcc_fused_3"
-  [(set (pc)
-       (if_then_else
-         (match_operator 1 "ix86_comparison_uns_operator"
-           [(match_operand:SWI32 2 "nonimmediate_operand" "<r>,m,<r>")
-            (match_operand:SWI32 3 "<general_operand>" "<r><i>,<r>,m")])
-        (label_ref (match_operand 0 "" ""))
-        (pc)))]
-  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT
-   && !(MEM_P (operands[2])
-       && (MEM_P (operands[3]) || CONST_INT_P (operands[3])))"
-{
-  return "cmp{<imodesuffix>}\t{%3, %2|%2, %3}\n\t"
-        "%+j%E1\t%l0\t" ASM_COMMENT_START " fused";
-}
-  [(set_attr "type" "multi")
-   (set_attr "mode" "<MODE>")])
-
-(define_insn "*jcc_fused_4"
-  [(set (pc)
-       (if_then_else
-         (match_operator 1 "ix86_comparison_uns_operator"
-           [(match_operand:SWI32 2 "nonimmediate_operand" "<r>,m,<r>")
-            (match_operand:SWI32 3 "<general_operand>" "<r><i>,<r>,m")])
-        (pc)
-        (label_ref (match_operand 0 "" ""))))]
-  "TARGET_FUSE_CMP_AND_BRANCH && !TARGET_64BIT
-   && !(MEM_P (operands[2])
-       && (MEM_P (operands[3]) || CONST_INT_P (operands[3])))"
-{
-  return "cmp{<imodesuffix>}\t{%3, %2|%2, %3}\n\t"
-        "%+j%e1\t%l0\t" ASM_COMMENT_START " fused";
-}
-  [(set_attr "type" "multi")
-   (set_attr "mode" "<MODE>")])
-
 ;; In general it is not safe to assume too much about CCmode registers,
 ;; so simplify-rtx stops when it sees a second one.  Under certain
 ;; conditions this is safe on x86, so help combine not create