auto *Br = dyn_cast<BranchInst>(BB.getTerminator());
if (!Br || !Br->isConditional())
continue;
+
+ // If the condition is an OR of 2 compares and the false successor only has
+ // the current block as predecessor, queue both negated conditions for the
+ // false successor.
+ if (match(Br->getCondition(), m_Or(m_Cmp(), m_Cmp()))) {
+ BasicBlock *FalseSuccessor = Br->getSuccessor(1);
+ if (FalseSuccessor->getSinglePredecessor()) {
+ auto *OrI = cast<Instruction>(Br->getCondition());
+ WorkList.emplace_back(DT.getNode(FalseSuccessor),
+ cast<CmpInst>(OrI->getOperand(0)), true);
+ WorkList.emplace_back(DT.getNode(FalseSuccessor),
+ cast<CmpInst>(OrI->getOperand(1)), true);
+ }
+ continue;
+ }
+
auto *CmpI = dyn_cast<CmpInst>(Br->getCondition());
if (!CmpI)
continue;
; CHECK-NEXT: ret i32 10
; CHECK: exit:
; CHECK-NEXT: [[F_1:%.*]] = icmp ule i32 [[X]], [[Z]]
-; CHECK-NEXT: call void @use(i1 [[F_1]])
+; CHECK-NEXT: call void @use(i1 false)
; CHECK-NEXT: [[C_5:%.*]] = icmp ule i32 [[X]], [[A]]
; CHECK-NEXT: call void @use(i1 [[C_5]])
; CHECK-NEXT: [[T_1:%.*]] = icmp ugt i32 [[Y]], [[Z]]
-; CHECK-NEXT: call void @use(i1 [[T_1]])
+; CHECK-NEXT: call void @use(i1 true)
; CHECK-NEXT: [[T_2:%.*]] = icmp ugt i32 [[X]], [[Y]]
-; CHECK-NEXT: call void @use(i1 [[T_2]])
+; CHECK-NEXT: call void @use(i1 true)
; CHECK-NEXT: [[T_3:%.*]] = icmp ugt i32 [[X]], [[Z]]
-; CHECK-NEXT: call void @use(i1 [[T_3]])
+; CHECK-NEXT: call void @use(i1 true)
; CHECK-NEXT: ret i32 20
;
entry: