This adds R-Car Generation 4 (Gen4) support as Renesas ARM64 SoC.
In this version, reusing R-Car Gen3 lowlevel initialize routine [1]
and R-Car Gen3 memory map tables [2] .
[1] arch/arm/mach-rmobile/lowlevel_init_gen3.S
[2] arch/arm/mach-rmobile/memmap-gen3.c
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: - Enable DTO support by default
- Sort the Kconfig lists
- Select RCAR_64 Kconfig option to pull in all the shared
Kconfig options with Gen3, and use where applicable to
deduplicate entries.
- Fix reference [2] typo in commit message
- Drop config options moved to Kconfig, rename rest to CFG_
accordingly to synchronize with upstream changes. Drop
removed CONFIG_VERY_BIG_RAM.
- Move board size limit to arch/Kconfig
- Move GICR_BASE to headers instead of common config]
config BUILD_TARGET
string "Build target special images"
- default "u-boot-elf.srec" if RCAR_GEN3
+ default "u-boot-elf.srec" if RCAR_64
default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL
default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
config HAS_BOARD_SIZE_LIMIT
bool "Define a maximum size for the U-Boot image"
- default y if RCAR_GEN3
+ default y if RCAR_64
help
In some cases, we need to enforce a hard limit on how big the U-Boot
image itself can be.
config BOARD_SIZE_LIMIT
int "Maximum size of the U-Boot image in bytes"
- default 1048576 if RCAR_GEN3
+ default 1048576 if RCAR_64
depends on HAS_BOARD_SIZE_LIMIT
help
Maximum size of the U-Boot image. When defined, the build system
imply SPL_USE_TINY_PRINTF
imply SPL_YMODEM_SUPPORT
+config RCAR_GEN4
+ bool "Renesas ARM SoCs R-Car Gen4 (64bit)"
+ select RCAR_64
+
config RZA1
prompt "Renesas ARM SoCs RZ/A1 (32bit)"
select CPU_V7A
default y if RCAR_64
source "arch/arm/mach-rmobile/Kconfig.rcar3"
+source "arch/arm/mach-rmobile/Kconfig.rcar4"
endif
--- /dev/null
+if RCAR_GEN4
+
+choice
+ prompt "Renesas ARM64 SoCs board select"
+ optional
+endchoice
+
+endif
obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o
obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o
obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o
-obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o
+obj-$(CONFIG_RCAR_64) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o
obj-$(CONFIG_RZ_G2) += cpu_info-rzg.o
ifneq ($(CONFIG_R8A779A0),)
static u32 rmobile_get_prr(void)
{
- if (IS_ENABLED(CONFIG_RCAR_GEN3))
+ if (IS_ENABLED(CONFIG_RCAR_64))
return readl(0xFFF00044);
return readl(0xFF000044);
}
#endif
-/* R-Car Gen3 D-cache is enabled in memmap-gen3.c */
-#ifndef CONFIG_RCAR_GEN3
+/* R-Car Gen3 and Gen4 D-cache is enabled in memmap-gen3.c */
+#ifndef CONFIG_RCAR_64
#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
void enable_caches(void)
{
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * ./arch/arm/mach-rmobile/include/mach/rcar-gen4-base.h
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#ifndef __ASM_ARCH_RCAR_GEN4_BASE_H
+#define __ASM_ARCH_RCAR_GEN4_BASE_H
+
+/*
+ * R-Car (R8A779F0) I/O Addresses
+ */
+#define RWDT_BASE 0xE6020000
+#define SWDT_BASE 0xE6030000
+#define TMU_BASE 0xE61E0000
+
+/* SCIF */
+#define SCIF0_BASE 0xE6E60000
+#define SCIF1_BASE 0xE6E68000
+#define SCIF2_BASE 0xE6E88000
+#define SCIF3_BASE 0xE6C50000
+#define SCIF4_BASE 0xE6C40000
+#define SCIF5_BASE 0xE6F30000
+
+/* CPG */
+#define CPGWPR 0xE6150000
+#define CPGWPCR 0xE6150004
+
+/* Reset */
+#define RST_BASE 0xE6160000 /* Domain0 */
+#define RST_SRESCR0 (RST_BASE + 0x18)
+#define RST_SPRES 0x5AA58000
+
+/* Arm Generic Timer */
+#define CNTCR_BASE 0xE6080000
+#define CNTFID0 (CNTCR_BASE + 0x020)
+#define CNTCR_EN BIT(0)
+
+/* GICv3 */
+/* Distributor Registers */
+#define GICD_BASE 0xF1000000
+#define GICR_BASE (GICR_LPI_BASE)
+
+/* ReDistributor Registers for Control and Physical LPIs */
+#define GICR_LPI_BASE 0xF1060000
+#define GICR_WAKER 0x0014
+#define GICR_PWRR 0x0024
+#define GICR_LPI_WAKER (GICR_LPI_BASE + GICR_WAKER)
+#define GICR_LPI_PWRR (GICR_LPI_BASE + GICR_PWRR)
+
+/* ReDistributor Registers for SGIs and PPIs */
+#define GICR_SGI_BASE 0xF1070000
+#define GICR_IGROUPR0 0x0080
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+#include <linux/bitops.h>
+
+/* RWDT */
+struct rcar_rwdt {
+ u32 rwtcnt;
+ u32 rwtcsra;
+ u32 rwtcsrb;
+};
+
+/* SWDT */
+struct rcar_swdt {
+ u32 swtcnt;
+ u32 swtcsra;
+ u32 swtcsrb;
+};
+#endif
+
+#endif /* __ASM_ARCH_RCAR_GEN4_BASE_H */
#include <asm/arch/r8a7794.h>
#elif defined(CONFIG_RCAR_GEN3)
#include <asm/arch/rcar-gen3-base.h>
+#elif defined(CONFIG_RCAR_GEN4)
+#include <asm/arch/rcar-gen4-base.h>
#elif defined(CONFIG_R7S72100)
#else
#error "SOC Name not defined"
#include <asm/arch/rmobile.h>
#include <linux/libfdt.h>
-#ifdef CONFIG_RCAR_GEN3
+#ifdef CONFIG_RCAR_64
DECLARE_GLOBAL_DATA_PTR;
config SYS_BOOTPARAMS_LEN
hex "Size of the bootparam buffer to malloc in bytes"
depends on SYS_MALLOC_BOOTPARAMS
- default 0x20000 if MIPS || RCAR_GEN3
+ default 0x20000 if MIPS || RCAR_64
default 0x10000
config ID_EEPROM
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * include/configs/rcar-gen4-common.h
+ * This file is R-Car Gen4 common configuration file.
+ *
+ * Copyright (C) 2021 Renesas Electronics Corporation
+ */
+
+#ifndef __RCAR_GEN4_COMMON_H
+#define __RCAR_GEN4_COMMON_H
+
+#include <asm/arch/rmobile.h>
+
+/* Console */
+#define CFG_SYS_BAUDRATE_TABLE { 38400, 115200, 921600, 1843200 }
+
+/* Memory */
+#define DRAM_RSV_SIZE 0x08000000
+#define CFG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE)
+#define CFG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE)
+#define CFG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE)
+
+/* PHY needs a longer autoneg timeout */
+#define PHY_ANEG_TIMEOUT 20000
+
+/* Environment setting */
+#define CFG_EXTRA_ENV_SETTINGS \
+ "bootm_size=0x10000000\0"
+
+#endif /* __RCAR_GEN4_COMMON_H */
projects / platform / kernel / u-boot.git / commitdiff