* config/mips/mips.c: Include tree-pass.h.

	(mips_reorg): Split in pre- and post-dbr_schedule parts.
	(mips_machine_reorg2): Move mips_reorg post-dbr_schedule parts here.
	(pass_mips_machine_reorg2): New machine specific pass.
	(insert_pass_mips_machine_reorg2): New pass plugin definition.
	(mips_option_override): Register the new pass.
	* rtl.h (cleanup_barriers): Remove prototype.
	(dbr_schedule): Likewise.
	* jump.c (cleanup_barriers): Make static.
	* reorg.c (dbr_schedule): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198640 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fec8b30..4786806 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2013-05-06  Steven Bosscher  <steven@gcc.gnu.org>
+
+
+       * config/mips/mips.c: Include tree-pass.h.
+       (mips_reorg): Split in pre- and post-dbr_schedule parts.
+       (mips_machine_reorg2): Move mips_reorg post-dbr_schedule parts here.
+       (pass_mips_machine_reorg2): New machine specific pass.
+       (insert_pass_mips_machine_reorg2): New pass plugin definition.
+       (mips_option_override): Register the new pass.
+       * rtl.h (cleanup_barriers): Remove prototype.
+       (dbr_schedule): Likewise.
+       * jump.c (cleanup_barriers): Make static.
+       * reorg.c (dbr_schedule): Likewise.
+
 2013-05-06  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/57185

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 7545b60..ab18382 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -55,6 +55,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "diagnostic.h"
 #include "target-globals.h"
 #include "opts.h"
+#include "tree-pass.h"
 
 /* True if X is an UNSPEC wrapper around a SYMBOL_REF or LABEL_REF.  */
 #define UNSPEC_ADDRESS_P(X)                                    \
@@ -16368,12 +16369,14 @@ mips_reorg (void)
       mips_df_reorg ();
       free_bb_for_insn ();
     }
+}
 
-  if (optimize > 0 && flag_delayed_branch)
-    {
-      cleanup_barriers ();
-      dbr_schedule (get_insns ());
-    }
+/* We use a machine specific pass to do a second machine dependent reorg
+   pass after delay branch scheduling.  */
+
+static unsigned int
+mips_machine_reorg2 (void)
+{
   mips_reorg_process_insns ();
   if (!TARGET_MIPS16
       && TARGET_EXPLICIT_RELOCS
@@ -16386,6 +16389,34 @@ mips_reorg (void)
     mips_reorg_process_insns ();
   mips16_split_long_branches ();
 }
+
+struct rtl_opt_pass pass_mips_machine_reorg2 =
+{
+ {
+  RTL_PASS,
+  "mach2",                             /* name */
+  OPTGROUP_NONE,                       /* optinfo_flags */
+  NULL,                                        /* gate */
+  mips_machine_reorg2,                 /* execute */
+  NULL,                                        /* sub */
+  NULL,                                        /* next */
+  0,                                   /* static_pass_number */
+  TV_MACH_DEP,                         /* tv_id */
+  0,                                   /* properties_required */
+  0,                                   /* properties_provided */
+  0,                                   /* properties_destroyed */
+  0,                                   /* todo_flags_start */
+  TODO_verify_rtl_sharing,             /* todo_flags_finish */
+ }
+};
+
+struct register_pass_info insert_pass_mips_machine_reorg2 =
+{
+  &pass_mips_machine_reorg2.pass,      /* pass */
+  "dbr",                               /* reference_pass_name */
+  1,                                   /* ref_pass_instance_number */
+  PASS_POS_INSERT_AFTER                        /* po_op */
+};
 \f
 /* Implement TARGET_ASM_OUTPUT_MI_THUNK.  Generate rtl rather than asm text
    in order to avoid duplicating too much logic from elsewhere.  */
@@ -17161,6 +17192,11 @@ mips_option_override (void)
      Do all CPP-sensitive stuff in uncompressed mode; we'll switch modes
      later if required.  */
   mips_set_compression_mode (0);
+
+  /* We register a second machine specific reorg pass after delay slot
+     filling.  Registering the pass must be done at start up.  It's
+     convenient to do it here.  */
+  register_pass (&insert_pass_mips_machine_reorg2);
 }
 
 /* Swap the register information for registers I and I + 1, which

diff --git a/gcc/jump.c b/gcc/jump.c
index 9a171f4..4fb1e6e 100644 (file)
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -118,7 +118,7 @@ rebuild_jump_labels_chain (rtx chain)
    This simple pass moves barriers and removes duplicates so that the
    old code is happy.
  */
-unsigned int
+static unsigned int
 cleanup_barriers (void)
 {
   rtx insn, next, prev;

diff --git a/gcc/reorg.c b/gcc/reorg.c
index 1bc73b0..237be6f 100644 (file)
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -3585,7 +3585,7 @@ make_return_insns (rtx first)
 \f
 /* Try to find insns to place in delay slots.  */
 
-void
+static void
 dbr_schedule (rtx first)
 {
   rtx insn, next, epilogue_insn = 0;

diff --git a/gcc/rtl.h b/gcc/rtl.h
index e9013ec..0d0a2a3 100644 (file)
--- a/gcc/rtl.h
+++ b/gcc/rtl.h
@@ -1930,7 +1930,6 @@ extern enum rtx_code swap_condition (enum rtx_code);
 extern enum rtx_code unsigned_condition (enum rtx_code);
 extern enum rtx_code signed_condition (enum rtx_code);
 extern void mark_jump_label (rtx, rtx, int);
-extern unsigned int cleanup_barriers (void);
 
 /* In jump.c */
 extern rtx delete_related_insns (rtx);
@@ -2674,9 +2673,6 @@ extern void reg_scan (rtx, unsigned int);
 extern void fix_register (const char *, int, int);
 extern bool invalid_mode_change_p (unsigned int, enum reg_class);
 
-/* In reorg.c */
-extern void dbr_schedule (rtx);
-
 /* In reload1.c */
 extern int function_invariant_p (const_rtx);