.get_scanout_position = vc4_crtc_get_scanout_position,
};
-static const struct vc4_crtc_data bcm2835_pv0_data = {
- .hvs_channel = 0,
+static const struct vc4_pv_data bcm2835_pv0_data = {
+ .base = {
+ .hvs_channel = 0,
+ },
.debugfs_name = "crtc0_regs",
.encoder_types = {
[PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI0,
},
};
-static const struct vc4_crtc_data bcm2835_pv1_data = {
- .hvs_channel = 2,
+static const struct vc4_pv_data bcm2835_pv1_data = {
+ .base = {
+ .hvs_channel = 2,
+ },
.debugfs_name = "crtc1_regs",
.encoder_types = {
[PV_CONTROL_CLK_SELECT_DSI] = VC4_ENCODER_TYPE_DSI1,
},
};
-static const struct vc4_crtc_data bcm2835_pv2_data = {
- .hvs_channel = 1,
+static const struct vc4_pv_data bcm2835_pv2_data = {
+ .base = {
+ .hvs_channel = 1,
+ },
.debugfs_name = "crtc2_regs",
.encoder_types = {
[PV_CONTROL_CLK_SELECT_DPI_SMI_HDMI] = VC4_ENCODER_TYPE_HDMI,
struct drm_crtc *crtc)
{
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
- const struct vc4_crtc_data *crtc_data = vc4_crtc->data;
- const enum vc4_encoder_type *encoder_types = crtc_data->encoder_types;
+ const struct vc4_crtc_data *crtc_data = vc4_crtc_to_vc4_crtc_data(vc4_crtc);
+ const struct vc4_pv_data *pv_data = vc4_crtc_to_vc4_pv_data(vc4_crtc);
+ const enum vc4_encoder_type *encoder_types = pv_data->encoder_types;
struct drm_encoder *encoder;
drm_for_each_encoder(encoder, drm) {
}
vc4_encoder = to_vc4_encoder(encoder);
- for (i = 0; i < ARRAY_SIZE(crtc_data->encoder_types); i++) {
+ for (i = 0; i < ARRAY_SIZE(pv_data->encoder_types); i++) {
if (vc4_encoder->type == encoder_types[i]) {
vc4_encoder->clock_select = i;
encoder->possible_crtcs |= drm_crtc_mask(crtc);
{
struct platform_device *pdev = to_platform_device(dev);
struct drm_device *drm = dev_get_drvdata(master);
- const struct vc4_crtc_data *pv_data;
+ const struct vc4_pv_data *pv_data;
struct vc4_crtc *vc4_crtc;
struct drm_crtc *crtc;
struct drm_plane *primary_plane, *destroy_plane, *temp;
pv_data = of_device_get_match_data(dev);
if (!pv_data)
return -ENODEV;
- vc4_crtc->data = pv_data;
+ vc4_crtc->data = &pv_data->base;
vc4_crtc->pdev = pdev;
vc4_crtc->regs = vc4_ioremap_regs(pdev, 0);
struct vc4_crtc_data {
/* Which channel of the HVS this pixelvalve sources from. */
int hvs_channel;
+};
+
+struct vc4_pv_data {
+ struct vc4_crtc_data base;
enum vc4_encoder_type encoder_types[4];
const char *debugfs_name;
+
};
struct vc4_crtc {
return (struct vc4_crtc *)crtc;
}
+static inline const struct vc4_crtc_data *
+vc4_crtc_to_vc4_crtc_data(const struct vc4_crtc *crtc)
+{
+ return crtc->data;
+}
+
+static inline const struct vc4_pv_data *
+vc4_crtc_to_vc4_pv_data(const struct vc4_crtc *crtc)
+{
+ const struct vc4_crtc_data *data = vc4_crtc_to_vc4_crtc_data(crtc);
+
+ return container_of(data, struct vc4_pv_data, base);
+}
+
struct vc4_crtc_state {
struct drm_crtc_state base;
/* Dlist area for this CRTC configuration. */