mmc: remove the MMC_MODE_HC flag

High capacity support is not a host capability, but a device capability
that is queried via the OCR. The flag in the operating conditions
request argument can just be set unconditionally. This matches the Linux
implementation.

[panto] Hand merged and renumbering MMC_MODE_DDR_52MHz.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 76fa0b0..53a8aca 100644 (file)
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -388,7 +388,7 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk)
                host->cfg.host_caps |= MMC_MODE_4BIT;
                host->cfg.host_caps &= ~MMC_MODE_8BIT;
        }
-       host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_HC;
+       host->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz;
 
        host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 10ec216..2bbacb3 100644 (file)
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -652,7 +652,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
                return -1;
        }
 
-       cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC;
+       cfg->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
 #ifdef CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
        cfg->cfg.host_caps |= MMC_MODE_DDR_52MHz;
 #endif

diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
index f804f4c..3653d00 100644 (file)
--- a/drivers/mmc/kona_sdhci.c
+++ b/drivers/mmc/kona_sdhci.c
@@ -121,7 +121,6 @@ int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
        host->name = "kona-sdhci";
        host->ioaddr = reg_base;
        host->quirks = quirks;
-       host->host_caps = MMC_MODE_HC;
 
        if (init_kona_mmc_core(host)) {
                free(host);

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 31f8647..3909e14 100644 (file)
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -363,15 +363,12 @@ static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
        cmd.cmdidx = MMC_CMD_SEND_OP_COND;
        cmd.resp_type = MMC_RSP_R3;
        cmd.cmdarg = 0;
-       if (use_arg && !mmc_host_is_spi(mmc)) {
-               cmd.cmdarg =
+       if (use_arg && !mmc_host_is_spi(mmc))
+               cmd.cmdarg = OCR_HCS |
                        (mmc->cfg->voltages &
                        (mmc->ocr & OCR_VOLTAGE_MASK)) |
                        (mmc->ocr & OCR_ACCESS_MODE);
 
-               if (mmc->cfg->host_caps & MMC_MODE_HC)
-                       cmd.cmdarg |= OCR_HCS;
-       }
        err = mmc_send_cmd(mmc, &cmd, NULL);
        if (err)
                return err;

diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c
index 8ca0904..056aef5 100644 (file)
--- a/drivers/mmc/mvebu_mmc.c
+++ b/drivers/mmc/mvebu_mmc.c
@@ -418,7 +418,7 @@ static struct mmc_config mvebu_mmc_cfg = {
        .f_min          = MVEBU_MMC_BASE_FAST_CLOCK / MVEBU_MMC_BASE_DIV_MAX,
        .f_max          = MVEBU_MMC_CLOCKRATE_MAX,
        .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
-       .host_caps      = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HC |
+       .host_caps      = MMC_MODE_4BIT | MMC_MODE_HS |
                          MMC_MODE_HS_52MHz,
        .part_type      = PART_TYPE_DOS,
        .b_max          = CONFIG_SYS_MMC_MAX_BLK_COUNT,

diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 2fa4eee..31fb3ab 100644 (file)
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -405,8 +405,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int))
        priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
 
        priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT |
-                        MMC_MODE_HS_52MHz | MMC_MODE_HS |
-                        MMC_MODE_HC;
+                        MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
        /*
         * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz

diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index dc725cb..8238a7e 100644 (file)
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -651,8 +651,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
        if (priv_data == NULL)
                return -1;
 
-       host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
-                            MMC_MODE_HC;
+       host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
        switch (dev_index) {
        case 0:

diff --git a/drivers/mmc/s3c_sdi.c b/drivers/mmc/s3c_sdi.c
index 1b5b705..02d1138 100644 (file)
--- a/drivers/mmc/s3c_sdi.c
+++ b/drivers/mmc/s3c_sdi.c
@@ -298,7 +298,7 @@ int s3cmmc_initialize(bd_t *bis, int (*getcd)(struct mmc *),
        cfg->name = "S3C MMC";
        cfg->ops = &s3cmmc_ops;
        cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
-       cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HC | MMC_MODE_HS;
+       cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_HS;
        cfg->f_min = 400000;
        cfg->f_max = get_PCLK() / 2;
        cfg->b_max = 0x80;

diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 0eec731..8e1968a 100644 (file)
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -76,7 +76,6 @@ static int s5p_sdhci_core_init(struct sdhci_host *host)
        host->set_control_reg = &s5p_sdhci_set_control_reg;
        host->set_clock = set_mmc_clk;
 
-       host->host_caps = MMC_MODE_HC;
        if (host->bus_width == 8)
                host->host_caps |= MMC_MODE_8BIT;
 

diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 76ba93b..f92cf00 100644 (file)
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -577,7 +577,7 @@ static struct mmc_config sh_mmcif_cfg = {
        .name           = DRIVER_NAME,
        .ops            = &sh_mmcif_ops,
        .host_caps      = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT |
-                         MMC_MODE_8BIT | MMC_MODE_HC,
+                         MMC_MODE_8BIT,
        .voltages       = MMC_VDD_32_33 | MMC_VDD_33_34,
        .b_max          = CONFIG_SYS_MMC_MAX_BLK_COUNT,
 };

diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 2233545..0b7eb12 100644 (file)
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -449,7 +449,7 @@ struct mmc *sunxi_mmc_init(int sdc_no)
 
        cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
        cfg->host_caps = MMC_MODE_4BIT;
-       cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
+       cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
        cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 
        cfg->f_min = 400000;

diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index 2cd8cf1..ca41b4d 100644 (file)
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -559,7 +559,7 @@ static int do_mmc_init(int dev_index)
                host->cfg.host_caps |= MMC_MODE_8BIT;
        if (host->width >= 4)
                host->cfg.host_caps |= MMC_MODE_4BIT;
-       host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
+       host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
        /*
         * min freq is for card identification, and is the highest

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index d4f3882..971acbb 100644 (file)
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -29,8 +29,6 @@ int zynq_sdhci_init(phys_addr_t regbase)
                       SDHCI_QUIRK_BROKEN_R1B;
        host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 
-       host->host_caps = MMC_MODE_HC;
-
        add_sdhci(host, 52000000, 52000000 >> 9);
        return 0;
 }

diff --git a/include/mmc.h b/include/mmc.h
index fbcbe35..dd98b3b 100644 (file)
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -55,8 +55,7 @@
 #define MMC_MODE_4BIT          (1 << 2)
 #define MMC_MODE_8BIT          (1 << 3)
 #define MMC_MODE_SPI           (1 << 4)
-#define MMC_MODE_HC            (1 << 5)
-#define MMC_MODE_DDR_52MHz     (1 << 6)
+#define MMC_MODE_DDR_52MHz     (1 << 5)
 
 #define SD_DATA_4BIT   0x00040000