re PR target/69461 (ICE in lra_set_insn_recog_data, at lra.c:964)
authorMichael Meissner <meissner@linux.vnet.ibm.com>
Thu, 4 Feb 2016 00:39:34 +0000 (00:39 +0000)
committerMichael Meissner <meissner@gcc.gnu.org>
Thu, 4 Feb 2016 00:39:34 +0000 (00:39 +0000)
2016-02-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
    Vladimir Makarov  <vmakarov@redhat.com>

PR target/69461
* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Fix thinko
in validating fused toc addresses.

Co-Authored-By: Vladimir Makarov <vmakarov@redhat.com>
From-SVN: r233120

gcc/ChangeLog
gcc/config/rs6000/rs6000.c

index 142e7a4..f379bc4 100644 (file)
@@ -1,3 +1,10 @@
+2016-02-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
+           Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR target/69461
+       * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Fix thinko
+       in validating fused toc addresses.
+
 2016-02-03  Jakub Jelinek  <jakub@redhat.com>
 
        PR c/69627
index 6f382cb..c7e0634 100644 (file)
@@ -8399,7 +8399,8 @@ rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict)
       && legitimate_constant_pool_address_p (x, mode,
                                             reg_ok_strict || lra_in_progress))
     return 1;
-  if (reg_offset_p && reg_addr[mode].fused_toc && toc_fusion_mem_wrapped (x, mode))
+  if (reg_offset_p && reg_addr[mode].fused_toc && GET_CODE (x) == UNSPEC
+      && XINT (x, 1) == UNSPEC_FUSION_ADDIS)
     return 1;
   /* For TImode, if we have load/store quad and TImode in VSX registers, only
      allow register indirect addresses.  This will allow the values to go in