arm64: dts: Update cache properties for Arm Ltd platforms
authorPierre Gondois <pierre.gondois@arm.com>
Mon, 7 Nov 2022 15:56:58 +0000 (16:56 +0100)
committerSudeep Holla <sudeep.holla@arm.com>
Tue, 8 Nov 2022 13:31:52 +0000 (13:31 +0000)
The DeviceTree Specification v0.3 specifies that the cache node
"compatible" and "cache-level" properties are required.

Cf. s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the properties
for unified cache is present ('cache-size', ...).

Update the relevant device trees nodes accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221107155825.1644604-6-pierre.gondois@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
arch/arm64/boot/dts/arm/corstone1000.dtsi
arch/arm64/boot/dts/arm/foundation-v8.dtsi
arch/arm64/boot/dts/arm/juno-r1.dts
arch/arm64/boot/dts/arm/juno-r2.dts
arch/arm64/boot/dts/arm/juno.dts
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts

index 4e46826..21f1f95 100644 (file)
@@ -53,6 +53,7 @@
 
        L2_0: l2-cache0 {
                compatible = "cache";
+               cache-unified;
                cache-level = <2>;
                cache-size = <0x80000>;
                cache-line-size = <64>;
index 83e3e7e..c8bd23b 100644 (file)
@@ -58,6 +58,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index 6451c62..1d90eee 100644 (file)
 
                A57_L2: l2-cache0 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x200000>;
                        cache-line-size = <64>;
                        cache-sets = <2048>;
 
                A53_L2: l2-cache1 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x100000>;
                        cache-line-size = <64>;
                        cache-sets = <1024>;
index 438cd1f..d2ada69 100644 (file)
 
                A72_L2: l2-cache0 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x200000>;
                        cache-line-size = <64>;
                        cache-sets = <2048>;
 
                A53_L2: l2-cache1 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x100000>;
                        cache-line-size = <64>;
                        cache-sets = <1024>;
index cf4a582..5e48a01 100644 (file)
 
                A57_L2: l2-cache0 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x200000>;
                        cache-line-size = <64>;
                        cache-sets = <2048>;
 
                A53_L2: l2-cache1 {
                        compatible = "cache";
+                       cache-unified;
                        cache-size = <0x100000>;
                        cache-line-size = <64>;
                        cache-sets = <1024>;
index 258991a..ef68f5a 100644 (file)
@@ -71,6 +71,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 
index 5b6d9d8..796cd7d 100644 (file)
@@ -57,6 +57,7 @@
 
                L2_0: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };