media: i2c: arducam_64mp: Add PDAF support

Enable PDAF output for all modes, and also need to modify Embedded Line
Width to 11560 * 3 (two lines of Embedded Data + one line of PDAF).

Signed-off-by: Lee Jackson <lee.jackson@arducam.com>

diff --git a/drivers/media/i2c/arducam_64mp.c b/drivers/media/i2c/arducam_64mp.c
index 3f23a4d..d4261af 100644 (file)
--- a/drivers/media/i2c/arducam_64mp.c
+++ b/drivers/media/i2c/arducam_64mp.c
@@ -95,7 +95,7 @@
 #define ARDUCAM_64MP_TEST_PATTERN_GB_DEFAULT   0
 
 /* Embedded metadata stream structure */
-#define ARDUCAM_64MP_EMBEDDED_LINE_WIDTH 16384
+#define ARDUCAM_64MP_EMBEDDED_LINE_WIDTH (11560 * 3)
 #define ARDUCAM_64MP_NUM_EMBEDDED_LINES 1
 
 enum pad_types {
@@ -144,6 +144,7 @@ struct arducam_64mp_mode {
 };
 
 static const struct arducam_64mp_reg mode_common_regs[] = {
+       {0x0100, 0x00},
        {0x0136, 0x18},
        {0x0137, 0x00},
        {0x33F0, 0x01},
@@ -788,6 +789,7 @@ static const struct arducam_64mp_reg mode_common_regs[] = {
        {0x3092, 0x01},
        {0x3093, 0x00},
        {0x0350, 0x00},
+       {0x3419, 0x00},
 };
 
 /* 64 mpix 2.7fps */
@@ -847,6 +849,14 @@ static const struct arducam_64mp_reg mode_9152x6944_regs[] = {
        {0x0205, 0x00},
        {0x020e, 0x01},
        {0x020f, 0x00},
+       {0x341a, 0x00},
+       {0x341b, 0x00},
+       {0x341c, 0x00},
+       {0x341d, 0x00},
+       {0x341e, 0x02},
+       {0x341f, 0x3c},
+       {0x3420, 0x02},
+       {0x3421, 0x42},
 };
 
 /* 48 mpix 3.0fps */
@@ -906,6 +916,14 @@ static const struct arducam_64mp_reg mode_8000x6000_regs[] = {
        {0x0205, 0x00},
        {0x020e, 0x01},
        {0x020f, 0x00},
+       {0x341a, 0x00},
+       {0x341b, 0x00},
+       {0x341c, 0x00},
+       {0x341d, 0x00},
+       {0x341e, 0x01},
+       {0x341f, 0xf4},
+       {0x3420, 0x01},
+       {0x3421, 0xf4},
 };
 
 /* 16 mpix 10fps */
@@ -959,6 +977,14 @@ static const struct arducam_64mp_reg mode_4624x3472_regs[] = {
        {0x98d8, 0x8c},
        {0x98d9, 0x0a},
        {0x99c4, 0x16},
+       {0x341a, 0x00},
+       {0x341b, 0x00},
+       {0x341c, 0x00},
+       {0x341d, 0x00},
+       {0x341e, 0x01},
+       {0x341f, 0x21},
+       {0x3420, 0x01},
+       {0x3421, 0x21},
 };
 
 /* 4k 20fps mode */
@@ -1012,6 +1038,14 @@ static const struct arducam_64mp_reg mode_3840x2160_regs[] = {
        {0x98d8, 0x8c},
        {0x98d9, 0x0a},
        {0x99c4, 0x16},
+       {0x341a, 0x00},
+       {0x341b, 0x00},
+       {0x341c, 0x00},
+       {0x341d, 0x00},
+       {0x341e, 0x00},
+       {0x341f, 0xf0},
+       {0x3420, 0x00},
+       {0x3421, 0xb4},
 };
 
 /* 4x4 binned 30fps mode */
@@ -1031,7 +1065,7 @@ static const struct arducam_64mp_reg mode_2312x1736_regs[] = {
        {0x0900, 0x01},
        {0x0901, 0x44},
        {0x0902, 0x08},
-       {0x30d8, 0x00},
+       {0x30d8, 0x04},
        {0x3200, 0x43},
        {0x3201, 0x43},
        {0x0408, 0x00},
@@ -1046,7 +1080,7 @@ static const struct arducam_64mp_reg mode_2312x1736_regs[] = {
        {0x034d, 0x08},
        {0x034e, 0x06},
        {0x034f, 0xc8},
-       {0x30d9, 0x01},
+       {0x30d9, 0x00},
        {0x32d5, 0x00},
        {0x32d6, 0x00},
        {0x401e, 0x00},
@@ -1065,6 +1099,14 @@ static const struct arducam_64mp_reg mode_2312x1736_regs[] = {
        {0x98d8, 0x8c},
        {0x98d9, 0x0a},
        {0x99c4, 0x16},
+       {0x341a, 0x00},
+       {0x341b, 0x00},
+       {0x341c, 0x00},
+       {0x341d, 0x00},
+       {0x341e, 0x00},
+       {0x341f, 0x90},
+       {0x3420, 0x00},
+       {0x3421, 0x90},
 };
 
 /* 1080p 60fps mode */
@@ -1118,6 +1160,14 @@ static const struct arducam_64mp_reg mode_1920x1080_regs[] = {
        {0x98d8, 0x8c},
        {0x98d9, 0x0a},
        {0x99c4, 0x16},
+       {0x341a, 0x00},
+       {0x341b, 0x00},
+       {0x341c, 0x00},
+       {0x341d, 0x00},
+       {0x341e, 0x00},
+       {0x341f, 0x78},
+       {0x3420, 0x00},
+       {0x3421, 0x5a},
 };
 
 /* 720p 120fps mode */
@@ -1171,6 +1221,14 @@ static const struct arducam_64mp_reg mode_1280x720_regs[] = {
        {0x98d8, 0x8c},
        {0x98d9, 0x0a},
        {0x99c4, 0x16},
+       {0x341a, 0x00},
+       {0x341b, 0x00},
+       {0x341c, 0x00},
+       {0x341d, 0x00},
+       {0x341e, 0x00},
+       {0x341f, 0x50},
+       {0x3420, 0x00},
+       {0x3421, 0x3c},
 };
 
 /* Mode configs */