Add tests for conditional branch with identical labels.
authorAri Suonpaa <ari.suonpaa@siru.fi>
Tue, 22 Aug 2017 12:18:00 +0000 (15:18 +0300)
committerAlexander Galazin <Alexander.Galazin@arm.com>
Wed, 30 Aug 2017 12:54:41 +0000 (08:54 -0400)
Add compute and graphics shader tests for OpBranchConditional
where both conditions point to the same branch.

Affects:

dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels*
dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels*

Components: Vulkan

VK-GL-CTS issue: 560

Change-Id: Ic2e0bfb8790469d134f413c58645d2228f933d36

AndroidGen.mk
android/cts/master/vk-master.txt
external/vulkancts/modules/vulkan/spirv_assembly/CMakeLists.txt
external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp [new file with mode: 0644]
external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.hpp [new file with mode: 0644]
external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp
external/vulkancts/mustpass/1.0.3/vk-default.txt

index 36d4875..4308716 100644 (file)
@@ -207,6 +207,7 @@ LOCAL_SRC_FILES := \
        external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsm16bitStorageTests.cpp \
        external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmComputeShaderCase.cpp \
        external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmComputeShaderTestUtil.cpp \
+       external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp \
        external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmGraphicsShaderTestUtil.cpp \
        external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmInstructionTests.cpp \
        external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmTests.cpp \
index 80b9170..b2c6513 100644 (file)
@@ -162371,6 +162371,8 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.push_constant_16_to_32.
 dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.push_constant_16_to_32.vector_sint
 dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.push_constant_16_to_32.vector_uint
 dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2
+dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true
+dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer
@@ -164413,6 +164415,16 @@ dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_tessc
 dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_tesse
 dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_geom
 dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_frag
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_vert
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_geom
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_frag
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_vert
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse
index 5717740..426f555 100644 (file)
@@ -7,6 +7,8 @@ set(DEQP_VK_SPIRV_ASSEMBLY_SRCS
        vktSpvAsm16bitStorageTests.hpp
        vktSpvAsmUboMatrixPaddingTests.cpp
        vktSpvAsmUboMatrixPaddingTests.hpp
+       vktSpvAsmConditionalBranchTests.cpp
+       vktSpvAsmConditionalBranchTests.hpp
        vktSpvAsmComputeShaderCase.cpp
        vktSpvAsmComputeShaderCase.hpp
        vktSpvAsmComputeShaderTestUtil.cpp
diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.cpp
new file mode 100644 (file)
index 0000000..320d53d
--- /dev/null
@@ -0,0 +1,236 @@
+/*-------------------------------------------------------------------------
+ * Vulkan Conformance Tests
+ * ------------------------
+ *
+ * Copyright (c) 2017 Google Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ *//*!
+ * \file
+ * \brief SPIR-V Assembly Tests for OpBranchConditional instruction.
+ *//*--------------------------------------------------------------------*/
+
+#include "vktSpvAsmConditionalBranchTests.hpp"
+#include "vktSpvAsmComputeShaderCase.hpp"
+#include "vktSpvAsmComputeShaderTestUtil.hpp"
+#include "vktSpvAsmGraphicsShaderTestUtil.hpp"
+
+#include "tcuStringTemplate.hpp"
+
+namespace vkt
+{
+namespace SpirVAssembly
+{
+
+using namespace vk;
+using std::map;
+using std::string;
+using std::vector;
+using tcu::RGBA;
+using tcu::IVec3;
+using tcu::StringTemplate;
+
+namespace
+{
+
+static const string conditions[] = { "true", "false" };
+
+void addComputeSameLabelsTest (tcu::TestCaseGroup* group)
+{
+       tcu::TestContext&               testCtx                 = group->getTestContext();
+       const int                               numItems                = 128;
+       vector<deUint32>                outputData;
+
+       outputData.reserve(numItems);
+       for (deUint32 numIdx = 0; numIdx < numItems; ++numIdx)
+               outputData.push_back(numIdx);
+
+       for (int conditionIdx = 0; conditionIdx < DE_LENGTH_OF_ARRAY(conditions); ++conditionIdx)
+       {
+               ComputeShaderSpec               spec;
+               map<string, string>             specs;
+               string                                  testName                = string("same_labels_") + conditions[conditionIdx];
+
+               const StringTemplate    shaderSource    (
+                       "                         OpCapability Shader\n"
+                       "                    %1 = OpExtInstImport \"GLSL.std.450\"\n"
+                       "                         OpMemoryModel Logical GLSL450\n"
+                       "                         OpEntryPoint GLCompute %main \"main\" %gl_GlobalInvocationID\n"
+                       "                         OpExecutionMode %main LocalSize 1 1 1\n"
+                       "                         OpSource GLSL 430\n"
+                       "                         OpDecorate %gl_GlobalInvocationID BuiltIn GlobalInvocationId\n"
+                       "                         OpDecorate %_arr_uint_uint_128 ArrayStride 4\n"
+                       "                         OpMemberDecorate %Output 0 Offset 0\n"
+                       "                         OpDecorate %Output BufferBlock\n"
+                       "                         OpDecorate %dataOutput DescriptorSet 0\n"
+                       "                         OpDecorate %dataOutput Binding 0\n"
+                       "                 %void = OpTypeVoid\n"
+                       "                    %3 = OpTypeFunction %void\n"
+                       "                 %uint = OpTypeInt 32 0\n"
+                       "   %_ptr_Function_uint = OpTypePointer Function %uint\n"
+                       "               %v3uint = OpTypeVector %uint 3\n"
+                       "    %_ptr_Input_v3uint = OpTypePointer Input %v3uint\n"
+                       "%gl_GlobalInvocationID = OpVariable %_ptr_Input_v3uint Input\n"
+                       "               %uint_0 = OpConstant %uint 0\n"
+                       "      %_ptr_Input_uint = OpTypePointer Input %uint\n"
+                       "                 %bool = OpTypeBool\n"
+                       "                 %true = OpConstantTrue %bool\n"
+                       "                %false = OpConstantFalse %bool\n"
+                       "             %uint_128 = OpConstant %uint 128\n"
+                       "   %_arr_uint_uint_128 = OpTypeArray %uint %uint_128\n"
+                       "               %Output = OpTypeStruct %_arr_uint_uint_128\n"
+                       "  %_ptr_Uniform_Output = OpTypePointer Uniform %Output\n"
+                       "           %dataOutput = OpVariable %_ptr_Uniform_Output Uniform\n"
+                       "    %_ptr_Uniform_uint = OpTypePointer Uniform %uint\n"
+                       "           %uint_dummy = OpConstant %uint 2863311530\n"
+                       "                 %main = OpFunction %void None %3\n"
+                       "                    %5 = OpLabel\n"
+                       "                    %i = OpVariable %_ptr_Function_uint Function\n"
+                       "                   %14 = OpAccessChain %_ptr_Input_uint %gl_GlobalInvocationID %uint_0\n"
+                       "                   %15 = OpLoad %uint %14\n"
+                       "                         OpStore %i %15\n"
+                       "               %uint_i = OpLoad %uint %i\n"
+                       "                         OpSelectionMerge %merge None\n"
+                       "                         OpBranchConditional %${condition} %live %live\n"
+                       "                 %live = OpLabel\n"
+                       "                   %31 = OpAccessChain %_ptr_Uniform_uint %dataOutput %uint_0 %uint_i\n"
+                       "                         OpStore %31 %uint_i\n"
+                       "                         OpBranch %merge\n"
+                       "                 %dead = OpLabel\n"
+                       "                   %35 = OpAccessChain %_ptr_Uniform_uint %dataOutput %uint_0 %uint_i\n"
+                       "                         OpStore %35 %uint_dummy\n"
+                       "                         OpBranch %merge\n"
+                       "                %merge = OpLabel\n"
+                       "                         OpReturn\n"
+                       "                         OpFunctionEnd\n");
+
+               specs["condition"]              = conditions[conditionIdx];
+               spec.assembly                   = shaderSource.specialize(specs);
+               spec.numWorkGroups              = IVec3(numItems, 1, 1);
+
+               spec.outputs.push_back(BufferSp(new Buffer<deUint32>(outputData)));
+
+               group->addChild(new SpvAsmComputeShaderCase(testCtx, testName.c_str(), "Tests both labels pointing to a same branch.", spec));
+       }
+}
+
+void addGraphicsSameLabelsTest (tcu::TestCaseGroup* group)
+{
+       const deUint32                  numItems                        = 128;
+       RGBA                                    defaultColors[4];
+       GraphicsResources               resources;
+       vector<deUint32>                outputData;
+
+       outputData.reserve(numItems);
+       for (deUint32 numIdx = 0; numIdx < numItems; ++numIdx)
+               outputData.push_back(numIdx);
+
+       resources.outputs.push_back(std::make_pair(VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, BufferSp(new Buffer<deUint32>(outputData))));
+
+       getDefaultColors(defaultColors);
+
+       for (int conditionIdx = 0; conditionIdx < DE_LENGTH_OF_ARRAY(conditions); ++conditionIdx)
+       {
+               map<string, string>             fragments;
+               map<string, string>             specs;
+               string                                  testName        = string("same_labels_") + conditions[conditionIdx];
+
+               fragments["pre_main"]                           =
+                       "          %c_u32_128 = OpConstant %u32 128\n"
+                       "                  %3 = OpTypeFunction %void\n"
+                       "               %true = OpConstantTrue %bool\n"
+                       "              %false = OpConstantFalse %bool\n"
+                       " %_arr_uint_uint_128 = OpTypeArray %u32 %c_u32_128\n"
+                       "             %Output = OpTypeStruct %_arr_uint_uint_128\n"
+                       "%_ptr_Uniform_Output = OpTypePointer Uniform %Output\n"
+                       "         %dataOutput = OpVariable %_ptr_Uniform_Output Uniform\n"
+                       "  %_ptr_Uniform_uint = OpTypePointer Uniform %u32\n"
+                       "             %fp_u32 = OpTypePointer Function %u32\n"
+                       "         %uint_dummy = OpConstant %u32 2863311530\n";
+
+               fragments["decoration"]                         =
+                       "                       OpDecorate %_arr_uint_uint_128 ArrayStride 4\n"
+                       "                       OpMemberDecorate %Output 0 Offset 0\n"
+                       "                       OpDecorate %Output BufferBlock\n"
+                       "                       OpDecorate %dataOutput DescriptorSet 0\n"
+                       "                       OpDecorate %dataOutput Binding 0\n";
+
+               const StringTemplate    testFun         (
+                       "          %test_code = OpFunction %v4f32 None %v4f32_function\n"
+                       "              %param = OpFunctionParameter %v4f32\n"
+
+                       "              %entry = OpLabel\n"
+                       "                  %i = OpVariable %fp_u32 Function\n"
+                       "                       OpStore %i %c_u32_0\n"
+                       "                       OpBranch %loop\n"
+
+                       "               %loop = OpLabel\n"
+                       "                 %15 = OpLoad %u32 %i\n"
+                       "                 %lt = OpSLessThan %bool %15 %c_u32_128\n"
+                       "                       OpLoopMerge %merge %inc None\n"
+                       "                       OpBranchConditional %lt %write %merge\n"
+
+                       "              %write = OpLabel\n"
+                       "             %uint_i = OpLoad %u32 %i\n"
+                       "                       OpSelectionMerge %condmerge None\n"
+                       "                       OpBranchConditional %${condition} %live %live\n"
+                       "               %live = OpLabel\n"
+                       "                 %31 = OpAccessChain %_ptr_Uniform_uint %dataOutput %c_u32_0 %uint_i\n"
+                       "                       OpStore %31 %uint_i\n"
+                       "                       OpBranch %condmerge\n"
+                       "               %dead = OpLabel\n"
+                       "                 %35 = OpAccessChain %_ptr_Uniform_uint %dataOutput %c_u32_0 %uint_i\n"
+                       "                       OpStore %35 %uint_dummy\n"
+                       "                       OpBranch %condmerge\n"
+                       "          %condmerge = OpLabel\n"
+                       "                       OpBranch %inc\n"
+
+                       "                %inc = OpLabel\n"
+                       "                 %37 = OpLoad %u32 %i\n"
+                       "                 %39 = OpIAdd %u32 %37 %c_u32_1\n"
+                       "                       OpStore %i %39\n"
+                       "                       OpBranch %loop\n"
+
+                       "              %merge = OpLabel\n"
+                       "                       OpReturnValue %param\n"
+
+                       "                       OpFunctionEnd\n");
+
+               specs["condition"]              = conditions[conditionIdx];
+               fragments["testfun"]    = testFun.specialize(specs);
+
+               createTestsForAllStages(testName.c_str(), defaultColors, defaultColors, fragments, resources, vector<string>(), group);
+       }
+}
+
+} // anonymous
+
+tcu::TestCaseGroup* createConditionalBranchComputeGroup (tcu::TestContext& testCtx)
+{
+       de::MovePtr<tcu::TestCaseGroup> group           (new tcu::TestCaseGroup(testCtx, "conditional_branch", "Compute tests for OpBranchConditional."));
+       addComputeSameLabelsTest(group.get());
+
+       return group.release();
+}
+
+tcu::TestCaseGroup* createConditionalBranchGraphicsGroup (tcu::TestContext& testCtx)
+{
+       de::MovePtr<tcu::TestCaseGroup> group           (new tcu::TestCaseGroup(testCtx, "conditional_branch", "Graphics tests for OpBranchConditional."));
+       addGraphicsSameLabelsTest(group.get());
+
+       return group.release();
+}
+
+} // SpirVAssembly
+} // vkt
diff --git a/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.hpp b/external/vulkancts/modules/vulkan/spirv_assembly/vktSpvAsmConditionalBranchTests.hpp
new file mode 100644 (file)
index 0000000..4a1efe8
--- /dev/null
@@ -0,0 +1,40 @@
+#ifndef _VKTSPVASMCONDITIONALBRANCHTESTS_HPP
+#define _VKTSPVASMCONDITIONALBRANCHTESTS_HPP
+/*-------------------------------------------------------------------------
+ * Vulkan Conformance Tests
+ * ------------------------
+ *
+ * Copyright (c) 2017 Google Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ *//*!
+ * \file
+ * \brief SPIR-V Assembly Tests for OpBranchConditional instruction.
+ *//*--------------------------------------------------------------------*/
+
+#include "tcuDefs.hpp"
+#include "tcuTestCase.hpp"
+
+namespace vkt
+{
+namespace SpirVAssembly
+{
+
+tcu::TestCaseGroup*    createConditionalBranchComputeGroup             (tcu::TestContext& testCtx);
+tcu::TestCaseGroup*    createConditionalBranchGraphicsGroup    (tcu::TestContext& testCtx);
+
+} // SpirVAssembly
+} // vkt
+
+#endif // _VKTSPVASMCONDITIONALBRANCHTESTS_HPP
index f1af856..8ec7db3 100644 (file)
@@ -52,6 +52,7 @@
 
 #include "vktSpvAsm16bitStorageTests.hpp"
 #include "vktSpvAsmUboMatrixPaddingTests.hpp"
+#include "vktSpvAsmConditionalBranchTests.hpp"
 #include "vktSpvAsmComputeShaderCase.hpp"
 #include "vktSpvAsmComputeShaderTestUtil.hpp"
 #include "vktSpvAsmGraphicsShaderTestUtil.hpp"
@@ -7843,6 +7844,7 @@ tcu::TestCaseGroup* createInstructionTests (tcu::TestContext& testCtx)
 
        computeTests->addChild(create16BitStorageComputeGroup(testCtx));
        computeTests->addChild(createUboMatrixPaddingComputeGroup(testCtx));
+       computeTests->addChild(createConditionalBranchComputeGroup(testCtx));
        computeTests->addChild(createVariablePointersComputeGroup(testCtx));
        graphicsTests->addChild(createOpNopTests(testCtx));
        graphicsTests->addChild(createOpSourceTests(testCtx));
@@ -7879,6 +7881,7 @@ tcu::TestCaseGroup* createInstructionTests (tcu::TestContext& testCtx)
 
        graphicsTests->addChild(create16BitStorageGraphicsGroup(testCtx));
        graphicsTests->addChild(createUboMatrixPaddingGraphicsGroup(testCtx));
+       graphicsTests->addChild(createConditionalBranchGraphicsGroup(testCtx));
        graphicsTests->addChild(createVariablePointersGraphicsGroup(testCtx));
 
        instructionTests->addChild(computeTests.release());
index 337edc7..670ad6b 100644 (file)
@@ -162372,6 +162372,8 @@ dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.push_constant_16_to_32.
 dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.push_constant_16_to_32.vector_sint
 dEQP-VK.spirv_assembly.instruction.compute.16bit_storage.push_constant_16_to_32.vector_uint
 dEQP-VK.spirv_assembly.instruction.compute.ubo_padding.mat2x2
+dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_true
+dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels_false
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opselect_single_buffer
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opfunctioncall_single_buffer
 dEQP-VK.spirv_assembly.instruction.compute.variable_pointers.compute.reads_opphi_single_buffer
@@ -164394,6 +164396,16 @@ dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_tessc
 dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_tesse
 dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_geom
 dEQP-VK.spirv_assembly.instruction.graphics.ubo_padding.mat2x2_frag
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_vert
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_geom
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_true_frag
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_vert
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tessc
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_tesse
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_geom
+dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels_false_frag
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_vert
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tessc
 dEQP-VK.spirv_assembly.instruction.graphics.variable_pointers.graphics.reads_opselect_single_buffer_tesse