+2016-01-14 Alan Lawrence <alan.lawrence@arm.com>
+
+ * config/mips/mips-ps-3d.md (reduc_splus_v2sf): Remove.
+ (reduc_plus_scal_v2sf): New.
+ (reduc_smax_v2sf): Rename to...
+ (reduc_smax_scal_v2sf): ...here, make result SFmode, add vec_extract.
+ (reduc_smin_v2sf): Rename to...
+ (reduc_smin_scal_v2sf): ...here, make result SFmode, add vec_extract.
+
2016-01-14 Jan Hubicka <hubicka@ucw.cz>
* alias.c (compare_base_symbol_refs): New function.
[(set_attr "type" "fadd")
(set_attr "mode" "SF")])
-(define_insn "reduc_splus_v2sf"
- [(set (match_operand:V2SF 0 "register_operand" "=f")
- (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f")
- (match_dup 1)]
- UNSPEC_ADDR_PS))]
+(define_expand "reduc_plus_scal_v2sf"
+ [(match_operand:SF 0 "register_operand" "=f")
+ (match_operand:V2SF 1 "register_operand" "f")]
"TARGET_HARD_FLOAT && TARGET_MIPS3D"
- "")
+ {
+ rtx temp = gen_reg_rtx (V2SFmode);
+ emit_insn (gen_mips_addr_ps (temp, operands[1], operands[1]));
+ rtx lane = BYTES_BIG_ENDIAN ? const1_rtx : const0_rtx;
+ emit_insn (gen_vec_extractv2sf (operands[0], temp, lane));
+ DONE;
+ })
; cvt.pw.ps - Floating Point Convert Paired Single to Paired Word
(define_insn "mips_cvt_pw_ps"
DONE;
})
-(define_expand "reduc_smin_v2sf"
- [(match_operand:V2SF 0 "register_operand")
+(define_expand "reduc_smin_scal_v2sf"
+ [(match_operand:SF 0 "register_operand")
(match_operand:V2SF 1 "register_operand")]
"TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT"
{
- mips_expand_vec_reduc (operands[0], operands[1], gen_sminv2sf3);
+ rtx temp = gen_reg_rtx (V2SFmode);
+ mips_expand_vec_reduc (temp, operands[1], gen_sminv2sf3);
+ rtx lane = BYTES_BIG_ENDIAN ? const1_rtx : const0_rtx;
+ emit_insn (gen_vec_extractv2sf (operands[0], temp, lane));
DONE;
})
-(define_expand "reduc_smax_v2sf"
- [(match_operand:V2SF 0 "register_operand")
+(define_expand "reduc_smax_scal_v2sf"
+ [(match_operand:SF 0 "register_operand")
(match_operand:V2SF 1 "register_operand")]
"TARGET_HARD_FLOAT && TARGET_PAIRED_SINGLE_FLOAT"
{
- mips_expand_vec_reduc (operands[0], operands[1], gen_smaxv2sf3);
+ rtx temp = gen_reg_rtx (V2SFmode);
+ mips_expand_vec_reduc (temp, operands[1], gen_smaxv2sf3);
+ rtx lane = BYTES_BIG_ENDIAN ? const1_rtx : const0_rtx;
+ emit_insn (gen_vec_extractv2sf (operands[0], temp, lane));
DONE;
})