#define QCOM_RPM_SMD_KEY_STATE 0x54415453
#define QCOM_RPM_SCALING_ENABLE_ID 0x2
-#define __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, key) \
- static struct clk_smd_rpm _platform##_##_active; \
- static struct clk_smd_rpm _platform##_##_name = { \
+#define __DEFINE_CLK_SMD_RPM_PREFIX(_platform, _prefix, _name, _active, \
+ type, r_id, key) \
+ static struct clk_smd_rpm _platform##_##_prefix##_active; \
+ static struct clk_smd_rpm _platform##_##_prefix##_name = { \
.rpm_res_type = (type), \
.rpm_clk_id = (r_id), \
.rpm_key = (key), \
- .peer = &_platform##_##_active, \
+ .peer = &_platform##_##_prefix##_active, \
.rate = INT_MAX, \
.hw.init = &(struct clk_init_data){ \
.ops = &clk_smd_rpm_ops, \
.num_parents = 1, \
}, \
}; \
- static struct clk_smd_rpm _platform##_##_active = { \
+ static struct clk_smd_rpm _platform##_##_prefix##_active = { \
.rpm_res_type = (type), \
.rpm_clk_id = (r_id), \
.active_only = true, \
.rpm_key = (key), \
- .peer = &_platform##_##_name, \
+ .peer = &_platform##_##_prefix##_name, \
.rate = INT_MAX, \
.hw.init = &(struct clk_init_data){ \
.ops = &clk_smd_rpm_ops, \
}, \
}
+#define __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, key) \
+ __DEFINE_CLK_SMD_RPM_PREFIX(_platform, /* empty */, _name, _active, \
+ type, r_id, key)
+
#define __DEFINE_CLK_SMD_RPM_BRANCH_PREFIX(_platform, _prefix, _name, _active,\
type, r_id, r, key) \
static struct clk_smd_rpm _platform##_##_prefix##_active; \
__DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, \
type, r_id, QCOM_RPM_SMD_KEY_RATE)
+#define DEFINE_CLK_SMD_RPM_BUS(_platform, _name, r_id) \
+ __DEFINE_CLK_SMD_RPM_PREFIX(_platform, bus_##r_id##_, \
+ _name##_clk, _name##_a_clk, QCOM_SMD_RPM_BUS_CLK, r_id, \
+ QCOM_RPM_SMD_KEY_RATE)
+
#define DEFINE_CLK_SMD_RPM_CLK_SRC(_platform, _name, type, r_id) \
__DEFINE_CLK_SMD_RPM(_platform, \
_name##_clk_src, _name##_a_clk_src, \
DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc, QCOM_SMD_RPM_AGGR_CLK, 1);
DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2);
-DEFINE_CLK_SMD_RPM(msm8916, pcnoc, QCOM_SMD_RPM_BUS_CLK, 0);
-DEFINE_CLK_SMD_RPM(msm8916, snoc, QCOM_SMD_RPM_BUS_CLK, 1);
-DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc, QCOM_SMD_RPM_BUS_CLK, 2);
-DEFINE_CLK_SMD_RPM(msm8974, cnoc, QCOM_SMD_RPM_BUS_CLK, 2);
-DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb, QCOM_SMD_RPM_BUS_CLK, 3);
-DEFINE_CLK_SMD_RPM(sm6125, snoc_periph, QCOM_SMD_RPM_BUS_CLK, 0);
-DEFINE_CLK_SMD_RPM(sm6125, cnoc, QCOM_SMD_RPM_BUS_CLK, 1);
-DEFINE_CLK_SMD_RPM(sm6125, snoc, QCOM_SMD_RPM_BUS_CLK, 2);
-DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass, QCOM_SMD_RPM_BUS_CLK, 5);
+DEFINE_CLK_SMD_RPM_BUS(msm8916, pcnoc, 0);
+DEFINE_CLK_SMD_RPM_BUS(msm8916, snoc, 1);
+DEFINE_CLK_SMD_RPM_BUS(msm8936, sysmmnoc, 2);
+DEFINE_CLK_SMD_RPM_BUS(msm8974, cnoc, 2);
+DEFINE_CLK_SMD_RPM_BUS(msm8974, mmssnoc_ahb, 3);
+DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_periph, 0);
+DEFINE_CLK_SMD_RPM_BUS(sm6125, cnoc, 1);
+DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc, 2);
+DEFINE_CLK_SMD_RPM_BUS(sm6125, snoc_lpass, 5);
DEFINE_CLK_SMD_RPM(msm8916, bimc, QCOM_SMD_RPM_MEM_CLK, 0);
DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc, QCOM_SMD_RPM_MEM_CLK, 1);
DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8992, div_clk3, 13, 19200000);
static struct clk_smd_rpm *msm8909_clks[] = {
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,
};
static struct clk_smd_rpm *msm8916_clks[] = {
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
};
static struct clk_smd_rpm *msm8936_clks[] = {
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
- [RPM_SMD_SYSMMNOC_CLK] = &msm8936_sysmmnoc_clk,
- [RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_sysmmnoc_a_clk,
+ [RPM_SMD_SYSMMNOC_CLK] = &msm8936_bus_2_sysmmnoc_clk,
+ [RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_bus_2_sysmmnoc_a_clk,
[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
};
static struct clk_smd_rpm *msm8974_clks[] = {
- [RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
- [RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
- [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
- [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
+ [RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
+ [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
+ [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
static struct clk_smd_rpm *msm8976_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
- [RPM_SMD_SYSMMNOC_CLK] = &msm8936_sysmmnoc_clk,
- [RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_sysmmnoc_a_clk,
+ [RPM_SMD_SYSMMNOC_CLK] = &msm8936_bus_2_sysmmnoc_clk,
+ [RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_bus_2_sysmmnoc_a_clk,
[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
static struct clk_smd_rpm *msm8992_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
+ [RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
- [RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
- [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
- [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
+ [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
+ [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
static struct clk_smd_rpm *msm8994_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
+ [RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
[RPM_SMD_OCMEMGX_CLK] = &msm8974_ocmemgx_clk,
[RPM_SMD_OCMEMGX_A_CLK] = &msm8974_ocmemgx_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
- [RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
[RPM_SMD_GFX3D_CLK_SRC] = &msm8974_gfx3d_clk_src,
[RPM_SMD_GFX3D_A_CLK_SRC] = &msm8974_gfx3d_a_clk_src,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
[RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a,
[RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin,
[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
[RPM_SMD_LN_BB_CLK] = &qcs404_ln_bb_clk,
[RPM_SMD_LN_BB_A_CLK] = &qcs404_ln_bb_clk_a,
- [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_mmssnoc_ahb_clk,
- [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_mmssnoc_ahb_a_clk,
+ [RPM_SMD_MMSSNOC_AHB_CLK] = &msm8974_bus_3_mmssnoc_ahb_clk,
+ [RPM_SMD_MMSSNOC_AHB_A_CLK] = &msm8974_bus_3_mmssnoc_ahb_a_clk,
[RPM_SMD_MSS_CFG_AHB_CLK] = &msm8992_branch_mss_cfg_ahb_clk,
[RPM_SMD_MSS_CFG_AHB_A_CLK] = &msm8992_branch_mss_cfg_ahb_a_clk,
[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
};
static struct clk_smd_rpm *msm8996_clks[] = {
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
- [RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_MMAXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
static struct clk_smd_rpm *qcs404_clks[] = {
[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
- [RPM_SMD_PNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_PNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_BIMC_GPU_CLK] = &qcs404_bimc_gpu_clk,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
- [RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
[RPM_SMD_DIV_CLK1] = &msm8974_div_clk1,
static struct clk_smd_rpm *sdm660_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
- [RPM_SMD_CNOC_CLK] = &msm8974_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &msm8974_cnoc_a_clk,
- [RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &msm8974_bus_2_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &msm8974_bus_2_cnoc_a_clk,
+ [RPM_SMD_CNOC_PERIPH_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_CNOC_PERIPH_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_MMSSNOC_AXI_CLK] = &msm8996_mmssnoc_axi_rpm_clk,
static struct clk_smd_rpm *mdm9607_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,
static struct clk_smd_rpm *msm8953_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
- [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
- [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
+ [RPM_SMD_PCNOC_CLK] = &msm8916_bus_0_pcnoc_clk,
+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_bus_0_pcnoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &msm8916_bus_1_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &msm8916_bus_1_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
- [RPM_SMD_SYSMMNOC_CLK] = &msm8936_sysmmnoc_clk,
- [RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_sysmmnoc_a_clk,
+ [RPM_SMD_SYSMMNOC_CLK] = &msm8936_bus_2_sysmmnoc_clk,
+ [RPM_SMD_SYSMMNOC_A_CLK] = &msm8936_bus_2_sysmmnoc_a_clk,
[RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk,
[RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk,
[RPM_SMD_BB_CLK1] = &msm8916_bb_clk1,
static struct clk_smd_rpm *sm6125_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
- [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
- [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
- [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
- [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
- [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
+ [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
+ [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
+ [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
+ [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
};
static const struct rpm_smd_clk_desc rpm_clk_sm6125 = {
static struct clk_smd_rpm *sm6115_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
[RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a,
[RPM_SMD_RF_CLK2] = &msm8916_rf_clk2,
[RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a,
- [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
- [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
- [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
- [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
- [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
+ [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
+ [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
+ [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
+ [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
[RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin,
[RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin,
[RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin,
static struct clk_smd_rpm *sm6375_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
[RPM_SMD_QDSS_A_CLK] = &sm6125_branch_qdss_a_clk,
- [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
- [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
- [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
- [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
- [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
+ [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
+ [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
+ [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
+ [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
[RPM_SMD_HWKM_CLK] = &qcm2290_hwkm_clk,
static struct clk_smd_rpm *qcm2290_clks[] = {
[RPM_SMD_XO_CLK_SRC] = &sdm660_branch_bi_tcxo,
[RPM_SMD_XO_A_CLK_SRC] = &sdm660_branch_bi_tcxo_a,
- [RPM_SMD_SNOC_CLK] = &sm6125_snoc_clk,
- [RPM_SMD_SNOC_A_CLK] = &sm6125_snoc_a_clk,
+ [RPM_SMD_SNOC_CLK] = &sm6125_bus_2_snoc_clk,
+ [RPM_SMD_SNOC_A_CLK] = &sm6125_bus_2_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
[RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk,
[RPM_SMD_QDSS_CLK] = &sm6125_branch_qdss_clk,
[RPM_SMD_LN_BB_CLK2_A] = &msm8998_ln_bb_clk2_a,
[RPM_SMD_RF_CLK3] = &qcm2290_38m4_rf_clk3,
[RPM_SMD_RF_CLK3_A] = &qcm2290_38m4_rf_clk3_a,
- [RPM_SMD_CNOC_CLK] = &sm6125_cnoc_clk,
- [RPM_SMD_CNOC_A_CLK] = &sm6125_cnoc_a_clk,
+ [RPM_SMD_CNOC_CLK] = &sm6125_bus_1_cnoc_clk,
+ [RPM_SMD_CNOC_A_CLK] = &sm6125_bus_1_cnoc_a_clk,
[RPM_SMD_IPA_CLK] = &msm8976_ipa_clk,
[RPM_SMD_IPA_A_CLK] = &msm8976_ipa_a_clk,
[RPM_SMD_QUP_CLK] = &sm6125_qup_clk,
[RPM_SMD_MMRT_A_CLK] = &sm6125_mmrt_a_clk,
[RPM_SMD_MMNRT_CLK] = &sm6125_mmnrt_clk,
[RPM_SMD_MMNRT_A_CLK] = &sm6125_mmnrt_a_clk,
- [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_snoc_periph_clk,
- [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_snoc_periph_a_clk,
- [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_snoc_lpass_clk,
- [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_snoc_lpass_a_clk,
+ [RPM_SMD_SNOC_PERIPH_CLK] = &sm6125_bus_0_snoc_periph_clk,
+ [RPM_SMD_SNOC_PERIPH_A_CLK] = &sm6125_bus_0_snoc_periph_a_clk,
+ [RPM_SMD_SNOC_LPASS_CLK] = &sm6125_bus_5_snoc_lpass_clk,
+ [RPM_SMD_SNOC_LPASS_A_CLK] = &sm6125_bus_5_snoc_lpass_a_clk,
[RPM_SMD_CE1_CLK] = &msm8992_ce1_clk,
[RPM_SMD_CE1_A_CLK] = &msm8992_ce1_a_clk,
[RPM_SMD_QPIC_CLK] = &qcs404_qpic_clk,