s5pc110: onenand: remove unused code
authorMinkyu Kang <mk7.kang@samsung.com>
Wed, 12 Jan 2011 10:05:36 +0000 (19:05 +0900)
committerMinkyu Kang <mk7.kang@samsung.com>
Wed, 12 Jan 2011 10:05:36 +0000 (19:05 +0900)
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
board/samsung/universal_c110/onenand.c

index 001d428..f43324b 100644 (file)
 
 #include <onenand_uboot.h>
 
-#include <asm/io.h>
-#include <asm/arch/clock.h>
-
 void onenand_board_init(struct mtd_info *mtd)
 {
        struct onenand_chip *this = mtd->priv;
-       int value;
-
-       if (cpu_is_s5pc110()) {
-               this->base = (void *) 0xB0000000;
-               this->options |= ONENAND_RUNTIME_BADBLOCK_CHECK;
-               this->chip_probe = s5pc110_chip_probe;
-       } else {
-               struct s5pc100_clock *clk =
-                       (struct s5pc100_clock *)samsung_get_base_clock();
-               struct samsung_onenand *onenand;
-
-               this->base = (void *) S5PC100_ONENAND_BASE;
-               onenand = (struct samsung_onenand *)this->base;
-
-               /* D0 Domain system 1 clock gating */
-               value = readl(&clk->gate_d00);
-               value &= ~(1 << 2);             /* CFCON */
-               value |= (1 << 2);
-               writel(value, &clk->gate_d00);
-
-               /* D0 Domain memory clock gating */
-               value = readl(&clk->gate_d01);
-               value &= ~(1 << 2);             /* CLK_ONENANDC */
-               value |= (1 << 2);
-               writel(value, &clk->gate_d01);
-
-               /* System Special clock gating */
-               value = readl(&clk->gate_sclk0);
-               value &= ~(1 << 2);             /* OneNAND */
-               value |= (1 << 2);
-               writel(value, &clk->gate_sclk0);
-
-               value = readl(&clk->src0);
-               value &= ~(1 << 24);            /* MUX_1nand: 0 from HCLKD0 */
-               value &= ~(1 << 20);            /* MUX_HREF: 0 from FIN_27M */
-               writel(value, &clk->src0);
-
-               value = readl(&clk->div1);
-               value &= ~(3 << 16);
-               value |= (1 << 16);
-               writel(value, &clk->div1);
-
-               writel(ONENAND_MEM_RESET_COLD, &onenand->mem_reset);
-
-               while (!(readl(&onenand->int_err_stat) & RST_CMP))
-                       continue;
-
-               writel(RST_CMP, &onenand->int_err_ack);
-
-               /*
-                * Access_Clock [2:0]
-                * 166 MHz, 134 Mhz : 3
-                * 100 Mhz, 60 Mhz  : 2
-                */
-               writel(0x3, &onenand->acc_clock);
-
-               writel(INT_ERR_ALL, &onenand->int_err_mask);
-               writel(1 << 0, &onenand->int_pin_en);   /* Enable */
-
-               value = readl(&onenand->int_err_mask);
-               value &= ~RDY_ACT;
-               writel(value, &onenand->int_err_mask);
 
-               s3c_onenand_init(mtd);
-       }
+       this->base = (void *) 0xB0000000;
+       this->options |= ONENAND_RUNTIME_BADBLOCK_CHECK;
+       this->chip_probe = s5pc110_chip_probe;
 }