xgifb_reg_set(P3c4, 0x16, 0x80);
udelay(60);
- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
xgifb_reg_set(P3c4, 0x19, 0x01);
xgifb_reg_set(P3c4, 0x16, 0x03);
xgifb_reg_set(P3c4, 0x16, 0x83);
mdelay(1);
xgifb_reg_set(P3c4, 0x1B, 0x03);
udelay(500);
- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
xgifb_reg_set(P3c4, 0x19, 0x00);
xgifb_reg_set(P3c4, 0x16, 0x03);
xgifb_reg_set(P3c4, 0x16, 0x83);
xgifb_reg_set(P3c4, 0x16, 0x00);
xgifb_reg_set(P3c4, 0x16, 0x80);
udelay(60);
- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
xgifb_reg_set(P3c4, 0x19, 0x01);
xgifb_reg_set(P3c4, 0x16, 0x03);
xgifb_reg_set(P3c4, 0x16, 0x83);
mdelay(1);
xgifb_reg_set(P3c4, 0x1B, 0x03);
udelay(500);
- xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */
+ xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */
xgifb_reg_set(P3c4, 0x19, 0x00);
xgifb_reg_set(P3c4, 0x16, 0x03);
xgifb_reg_set(P3c4, 0x16, 0x83);
pVBInfo->VBInfo = 0;
pVBInfo->TVInfo = 0;
- pVBInfo->SR15 = XGI340_SR13;
+ pVBInfo->SR18 = XGI340_SR18;
pVBInfo->CR40 = XGI340_cr41;
/* 310 customization related */
pVBInfo->MCLKData = XGI27New_MCLKData;
pVBInfo->CR40 = XGI27_cr41;
pVBInfo->XGINew_CR97 = 0xc1;
- pVBInfo->SR15 = XG27_SR13;
+ pVBInfo->SR18 = XG27_SR18;
/*Z11m DDR*/
temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B);