Documentation: devicetree: add Broadcom SATA PHY binding
authorBrian Norris <computersforpeace@gmail.com>
Tue, 12 May 2015 23:28:20 +0000 (16:28 -0700)
committerKishon Vijay Abraham I <kishon@ti.com>
Fri, 22 May 2015 11:23:09 +0000 (16:53 +0530)
For 28nm STB chips, based on BCM7445.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt b/Documentation/devicetree/bindings/phy/brcm,brcmstb-sata-phy.txt
new file mode 100644 (file)
index 0000000..7f81ef9
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+* Broadcom SATA3 PHY for STB
+
+Required properties:
+- compatible: should be one or more of
+     "brcm,bcm7445-sata-phy"
+     "brcm,phy-sata3"
+- address-cells: should be 1
+- size-cells: should be 0
+- reg: register range for the PHY PCB interface
+- reg-names: should be "phy"
+
+Sub-nodes:
+  Each port's PHY should be represented as a sub-node.
+
+Sub-nodes required properties:
+- reg: the PHY number
+- phy-cells: generic PHY binding; must be 0
+Optional:
+- brcm,enable-ssc: use spread spectrum clocking (SSC) on this port
+
+
+Example:
+
+       sata-phy@f0458100 {
+               compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";
+               reg = <0xf0458100 0x1e00>, <0xf045804c 0x10>;
+               reg-names = "phy";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               sata-phy@0 {
+                       reg = <0>;
+                       #phy-cells = <0>;
+               };
+
+               sata-phy@1 {
+                       reg = <1>;
+                       #phy-cells = <0>;
+               };
+       };