drm/hisilicon/hibmc: add DPMS on/off function
authorZhihui Chen <chenzhihui4@huawei.com>
Fri, 20 Dec 2019 02:31:12 +0000 (10:31 +0800)
committerXinliang Liu <xinliang.liu@linaro.org>
Thu, 13 Feb 2020 09:52:40 +0000 (09:52 +0000)
add DPMS function to turn on/off signal of monitor

Signed-off-by: Zhihui Chen <chenzhihui4@huawei.com>
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Acked-by: Xinliang Liu <xinliang.liu@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20191220023112.2728-1-chenzhihui4@huawei.com
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_regs.h

index 9baeabd..c41d8f8 100644 (file)
@@ -187,6 +187,20 @@ static struct drm_plane *hibmc_plane_init(struct hibmc_drm_private *priv)
        return plane;
 }
 
+static void hibmc_crtc_dpms(struct drm_crtc *crtc, int dpms)
+{
+       struct hibmc_drm_private *priv = crtc->dev->dev_private;
+       unsigned int reg;
+
+       reg = readl(priv->mmio + HIBMC_CRT_DISP_CTL);
+       reg &= ~HIBMC_CRT_DISP_CTL_DPMS_MASK;
+       reg |= HIBMC_FIELD(HIBMC_CRT_DISP_CTL_DPMS, dpms);
+       reg &= ~HIBMC_CRT_DISP_CTL_TIMING_MASK;
+       if (dpms == HIBMC_CRT_DPMS_ON)
+               reg |= HIBMC_CRT_DISP_CTL_TIMING(1);
+       writel(reg, priv->mmio + HIBMC_CRT_DISP_CTL);
+}
+
 static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc,
                                     struct drm_crtc_state *old_state)
 {
@@ -203,6 +217,7 @@ static void hibmc_crtc_atomic_enable(struct drm_crtc *crtc,
        reg |= HIBMC_CURR_GATE_DISPLAY(1);
        hibmc_set_current_gate(priv, reg);
        drm_crtc_vblank_on(crtc);
+       hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_ON);
 }
 
 static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc,
@@ -211,6 +226,7 @@ static void hibmc_crtc_atomic_disable(struct drm_crtc *crtc,
        unsigned int reg;
        struct hibmc_drm_private *priv = crtc->dev->dev_private;
 
+       hibmc_crtc_dpms(crtc, HIBMC_CRT_DPMS_OFF);
        drm_crtc_vblank_off(crtc);
 
        hibmc_set_power_mode(priv, HIBMC_PW_MODE_CTL_MODE_SLEEP);
index b63a1ee..b9e20cf 100644 (file)
 
 #define HIBMC_CRT_DISP_CTL                     0x80200
 
+#define HIBMC_CRT_DISP_CTL_DPMS(x)             ((x) << 30)
+#define HIBMC_CRT_DISP_CTL_DPMS_MASK           0xc0000000
+
+#define HIBMC_CRT_DPMS_ON                      0
+#define HIBMC_CRT_DPMS_OFF                     3
+
 #define HIBMC_CRT_DISP_CTL_CRTSELECT(x)                ((x) << 25)
 #define HIBMC_CRT_DISP_CTL_CRTSELECT_MASK      0x2000000