radv: Do pipe misalignment check per plane.

Fixes: 4c99d6ff54b ("radv: flush L2 for images affected by the pipe misaligned issue on GFX10+")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9078>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 018bccc..37765ce 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -3280,41 +3280,45 @@ radv_image_is_pipe_misaligned(const struct radv_device *device,
 {
        struct radeon_info *rad_info = &device->physical_device->rad_info;
        unsigned log2_samples = util_logbase2(image->info.samples);
-       unsigned log2_bpp = util_logbase2(vk_format_get_blocksize(image->vk_format));
-       unsigned log2_bpp_and_samples;
 
        assert(rad_info->chip_class >= GFX10);
 
-       if (rad_info->chip_class >= GFX10_3) {
-               log2_bpp_and_samples = log2_bpp + log2_samples;
-       } else {
-               if (vk_format_is_depth(image->vk_format) &&
-                    image->info.array_size >= 8) {
-                       log2_bpp = 2;
-               }
+       for (unsigned i = 0; i < image->plane_count; ++i) {
+               VkFormat fmt = vk_format_get_plane_format(image->vk_format, i);
+               unsigned log2_bpp = util_logbase2(vk_format_get_blocksize(fmt));
+               unsigned log2_bpp_and_samples;
 
-               log2_bpp_and_samples = MIN2(6, log2_bpp + log2_samples);
-       }
-
-       unsigned num_pipes = G_0098F8_NUM_PIPES(rad_info->gb_addr_config);
-       int overlap = MAX2(0, log2_bpp_and_samples + num_pipes - 8);
+               if (rad_info->chip_class >= GFX10_3) {
+                       log2_bpp_and_samples = log2_bpp + log2_samples;
+               } else {
+                       if (vk_format_is_depth(image->vk_format) &&
+                           image->info.array_size >= 8) {
+                               log2_bpp = 2;
+                       }
 
-       if (vk_format_is_depth(image->vk_format)) {
-               if (radv_image_is_tc_compat_htile(image) && overlap) {
-                       return true;
+                       log2_bpp_and_samples = MIN2(6, log2_bpp + log2_samples);
                }
-       } else {
-               unsigned max_compressed_frags = G_0098F8_MAX_COMPRESSED_FRAGS(rad_info->gb_addr_config);
-               int log2_samples_frag_diff = MAX2(0, log2_samples - max_compressed_frags);
-               int samples_overlap = MIN2(log2_samples, overlap);
 
-               /* TODO: It shouldn't be necessary if the image has DCC but
-                * not readable by shader.
-                */
-               if ((radv_image_has_dcc(image) ||
-                    radv_image_is_tc_compat_cmask(image)) &&
-                    (samples_overlap > log2_samples_frag_diff)) {
-                       return true;
+               unsigned num_pipes = G_0098F8_NUM_PIPES(rad_info->gb_addr_config);
+               int overlap = MAX2(0, log2_bpp_and_samples + num_pipes - 8);
+
+               if (vk_format_is_depth(image->vk_format)) {
+                       if (radv_image_is_tc_compat_htile(image) && overlap) {
+                               return true;
+                       }
+               } else {
+                       unsigned max_compressed_frags = G_0098F8_MAX_COMPRESSED_FRAGS(rad_info->gb_addr_config);
+                       int log2_samples_frag_diff = MAX2(0, log2_samples - max_compressed_frags);
+                       int samples_overlap = MIN2(log2_samples, overlap);
+
+                       /* TODO: It shouldn't be necessary if the image has DCC but
+                        * not readable by shader.
+                        */
+                       if ((radv_image_has_dcc(image) ||
+                            radv_image_is_tc_compat_cmask(image)) &&
+                           (samples_overlap > log2_samples_frag_diff)) {
+                               return true;
+                       }
                }
        }