At present the interrupt table is included in all phases of U-Boot. Allow
it to be omitted, e.g. in TPL, to reduce size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
obj-$(CONFIG_INTEL_TANGIER) += tangier/
obj-$(CONFIG_APIC) += lapic.o ioapic.o
-obj-y += irq.o
+obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += irq.o
ifndef CONFIG_$(SPL_)X86_64
obj-$(CONFIG_SMP) += mp_init.o
endif
return 0;
}
-ulong write_pirq_routing_table(ulong addr)
-{
- if (!gd->arch.pirq_routing_table)
- return addr;
-
- return copy_pirq_routing_table(addr, gd->arch.pirq_routing_table);
-}
-
static const struct udevice_id irq_router_ids[] = {
{ .compatible = "intel,irq-router" },
{ }
#include <asm/pci.h>
#include <asm/pirq_routing.h>
+DECLARE_GLOBAL_DATA_PTR;
+
static u8 pirq_get_next_free_irq(struct udevice *dev, u8 *pirq, u16 bitmap,
bool irq_already_routed[])
{
return addr + rt->size;
}
+
+ulong write_pirq_routing_table(ulong addr)
+{
+ if (!gd->arch.pirq_routing_table)
+ return addr;
+
+ return copy_pirq_routing_table(addr, gd->arch.pirq_routing_table);
+}