dt-bindings: PCI: dwc: rockchip: Use generic binding
authorSebastian Reichel <sebastian.reichel@collabora.com>
Mon, 31 Jul 2023 16:57:21 +0000 (18:57 +0200)
committerRob Herring <robh@kernel.org>
Wed, 16 Aug 2023 16:09:19 +0000 (10:09 -0600)
Use the generic binding for Rockchip. This should either be
ignored/dropped or squashed into the previous commit.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230731165723.53069-4-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml
Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml

index 7836b9a..ad9954f 100644 (file)
@@ -17,8 +17,7 @@ description: |+
   snps,dw-pcie.yaml.
 
 allOf:
-  - $ref: /schemas/pci/pci-bus.yaml#
-  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#
+  - $ref: /schemas/pci/snps,dw-pcie.yaml#
 
 properties:
   compatible:
index d2b4fb8..8bbdeb8 100644 (file)
@@ -197,11 +197,15 @@ properties:
             Link Control register).
           const: bw_mg
         - description:
+            Combined Legacy A/B/C/D interrupt signal. See "^int(a|b|c|d)$" for
+            details.
+          const: legacy
+        - description:
             Vendor-specific IRQ names. Consider using the generic names above
             for new bindings.
           oneOf:
             - description: See native "app" IRQ for details
-              enum: [ intr ]
+              enum: [ intr, sys, pmc, msg, err ]
 
 additionalProperties: true