AAR.addAAResult(WrapperPass->getResult());
}));
}
- }
- if (TM.getTargetTriple().getArch() == Triple::amdgcn) {
- // TODO: May want to move later or split into an early and late one.
- addPass(createAMDGPUCodeGenPreparePass());
+ if (TM.getTargetTriple().getArch() == Triple::amdgcn) {
+ // TODO: May want to move later or split into an early and late one.
+ addPass(createAMDGPUCodeGenPreparePass());
+ }
}
TargetPassConfig::addIRPasses();
bool GCNPassConfig::addPreISel() {
AMDGPUPassConfig::addPreISel();
- addPass(createAMDGPULateCodeGenPreparePass());
+ if (TM->getOptLevel() > CodeGenOpt::None)
+ addPass(createAMDGPULateCodeGenPreparePass());
+
if (EnableAtomicOptimizations) {
addPass(createAMDGPUAtomicOptimizerPass());
}
; GCN-O0-NEXT: Lower OpenCL enqueued blocks
; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions
; GCN-O0-NEXT: FunctionPass Manager
-; GCN-O0-NEXT: Dominator Tree Construction
-; GCN-O0-NEXT: Post-Dominator Tree Construction
-; GCN-O0-NEXT: Natural Loop Information
-; GCN-O0-NEXT: Legacy Divergence Analysis
-; GCN-O0-NEXT: AMDGPU IR optimizations
; GCN-O0-NEXT: Lower Garbage Collection Instructions
; GCN-O0-NEXT: Shadow Stack GC Lowering
; GCN-O0-NEXT: Lower constant intrinsics
; GCN-O0-NEXT: Function Alias Analysis Results
; GCN-O0-NEXT: Flatten the CFG
; GCN-O0-NEXT: Dominator Tree Construction
-; GCN-O0-NEXT: Post-Dominator Tree Construction
-; GCN-O0-NEXT: Natural Loop Information
-; GCN-O0-NEXT: Legacy Divergence Analysis
-; GCN-O0-NEXT: AMDGPU IR late optimizations
; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl)
; GCN-O0-NEXT: Function Alias Analysis Results
+; GCN-O0-NEXT: Natural Loop Information
; GCN-O0-NEXT: Code sinking
+; GCN-O0-NEXT: Post-Dominator Tree Construction
; GCN-O0-NEXT: Legacy Divergence Analysis
; GCN-O0-NEXT: Unify divergent function exit nodes
; GCN-O0-NEXT: Lazy Value Information Analysis