i965: fix some FBO depth/stencil assertions
authorBrian Paul <brianp@vmware.com>
Wed, 14 Jan 2009 23:26:41 +0000 (16:26 -0700)
committerBrian Paul <brianp@vmware.com>
Wed, 14 Jan 2009 23:49:24 +0000 (16:49 -0700)
src/mesa/drivers/dri/intel/intel_depthstencil.c

index c2b4d77..f43b9ae 100644 (file)
@@ -177,8 +177,11 @@ intel_validate_paired_depth_stencil(GLcontext * ctx,
       }
       else {
          /* Separate depth/stencil buffers, need to interleave now */
-         ASSERT(depthRb->Base._BaseFormat == GL_DEPTH_COMPONENT);
-         ASSERT(stencilRb->Base._BaseFormat == GL_STENCIL_INDEX);
+         ASSERT(depthRb->Base._BaseFormat == GL_DEPTH_COMPONENT ||
+                depthRb->Base._BaseFormat == GL_DEPTH_STENCIL);
+         ASSERT(stencilRb->Base._BaseFormat == GL_STENCIL_INDEX ||
+                stencilRb->Base._BaseFormat == GL_DEPTH_STENCIL);
+
          /* may need to interleave depth/stencil now */
          if (depthRb->PairedStencil == stencilRb->Base.Name) {
             /* OK, the depth and stencil buffers are already interleaved */