dts: cvbsout: add clk path config in dts
authorNian Jing <nian.jing@amlogic.com>
Tue, 3 Jul 2018 11:44:10 +0000 (19:44 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Thu, 5 Jul 2018 08:16:10 +0000 (01:16 -0700)
PD#169489: add clk path config in dts

Change-Id: Id1ee72c9acf4030bff2e9f1c05e1420fdbe52131
Signed-off-by: Nian Jing <nian.jing@amlogic.com>
15 files changed:
arch/arm64/boot/dts/amlogic/g12a_pxp.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_skt_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u200_drm_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905d2_u220.dts
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211.dts
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211_512m.dts
arch/arm64/boot/dts/amlogic/g12a_s905x2_u211_buildroot.dts
arch/arm64/boot/dts/amlogic/g12a_s905y2_u221.dts
arch/arm64/boot/dts/amlogic/g12b_a311d_skt.dts
arch/arm64/boot/dts/amlogic/g12b_a311d_w400.dts
arch/arm64/boot/dts/amlogic/g12b_pxp.dts
drivers/amlogic/media/vout/cvbs/cvbs_out.c

index f0beb37..99d1228 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 5847c31..6f4f519 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 3817688..2c8550e 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 215ec97..8e59d40 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 1e26b76..abadb37 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 64dff1c..c2884ea 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 130fa6e..1cda171 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 9d5103b..165b1b1 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 9e6631e..f9ccd3a 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index f3e5b2f..b41e543 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index 227a942..757fec8 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12a */
index ee7c8d1..58d7034 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12b */
index 36bf70e..8c590fd 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12b */
index b511c30..f792665 100644 (file)
                        "venci_0_gate",
                        "venci_1_gate",
                        "vdac_clk_gate";
+               clk_path = <0>;
 
                /* performance: reg_address, reg_value */
                /* g12b */
index 8633c90..4c735f7 100644 (file)
@@ -1326,6 +1326,21 @@ static void cvbsout_get_config(struct device *dev)
                }
        }
 
+       /*clk path*/
+       /*0:vid_pll vid2_clk*/
+       /*1:gp0_pll vid2_clk*/
+       /*2:vid_pll vid1_clk*/
+       /*3:gp0_pll vid1_clk*/
+       ret = of_property_read_u32(dev->of_node, "clk_path", &val);
+       if (ret)
+               cvbs_log_info("clk_path config null\n");
+       else if (val > 3)
+               cvbs_log_err("error: invalid clk_path\n");
+       else {
+               cvbs_clk_path = val;
+               cvbs_log_info("clk path:%d\n", cvbs_clk_path);
+       }
+
        /* vdac config */
        ret = of_property_read_u32(dev->of_node, "vdac_config", &val);
        if (ret)