clk: vt8500: Fix division-by-0 when requested rate=0

A request to vt8500_dclk_(round_rate/set_rate) with rate=0 results
in a division-by-0 in the kernel.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
index 3306c2b..db7d41f 100644 (file)
--- a/drivers/clk/clk-vt8500.c
+++ b/drivers/clk/clk-vt8500.c
@@ -121,7 +121,12 @@ static long vt8500_dclk_round_rate(struct clk_hw *hw, unsigned long rate,
                                unsigned long *prate)
 {
        struct clk_device *cdev = to_clk_device(hw);
-       u32 divisor = *prate / rate;
+       u32 divisor;
+
+       if (rate == 0)
+               return 0;
+
+       divisor = *prate / rate;
 
        /* If prate / rate would be decimal, incr the divisor */
        if (rate * divisor < *prate)
@@ -142,9 +147,14 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
                                unsigned long parent_rate)
 {
        struct clk_device *cdev = to_clk_device(hw);
-       u32 divisor = parent_rate / rate;
+       u32 divisor;
        unsigned long flags = 0;
 
+       if (rate == 0)
+               return 0;
+
+       divisor =  parent_rate / rate;
+
        /* If prate / rate would be decimal, incr the divisor */
        if (rate * divisor < *prate)
                divisor++;