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drm/msm/a6xx: add GMU_CX_GMU_CX_FALNEXT_INTF write for a650
author
Jonathan Marek
<jonathan@marek.ca>
Tue, 8 Jun 2021 17:27:46 +0000
(13:27 -0400)
committer
Rob Clark
<robdclark@chromium.org>
Wed, 23 Jun 2021 14:33:55 +0000
(07:33 -0700)
downstream msm-5.14 kernel added a write to this register, so match that.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link:
https://lore.kernel.org/r/20210608172808.11803-4-jonathan@marek.ca
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a6xx_gmu.c
patch
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diff --git
a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index
e58e455
..
b64e623
100644
(file)
--- a/
drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/
drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@
-751,8
+751,10
@@
static int a6xx_gmu_fw_start(struct a6xx_gmu *gmu, unsigned int state)
int ret;
u32 chipid;
- if (adreno_is_a650(adreno_gpu))
+ if (adreno_is_a650(adreno_gpu)) {
+ gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FALNEXT_INTF, 1);
gmu_write(gmu, REG_A6XX_GPU_GMU_CX_GMU_CX_FAL_INTF, 1);
+ }
if (state == GMU_WARM_BOOT) {
ret = a6xx_rpmh_start(gmu);