local/ARM64: dts: exynos5433-pinctrl: add the nodes relevant to pcie
authorJaehoon Chung <jh80.chung@samsung.com>
Thu, 12 Feb 2015 02:03:01 +0000 (11:03 +0900)
committerSeung-Woo Kim <sw0312.kim@samsung.com>
Wed, 14 Dec 2016 04:44:26 +0000 (13:44 +0900)
Add the nodes relevant to pcie into pcintrl file.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
arch/arm64/boot/dts/exynos/exynos5433-pinctrl.dtsi

index d043f45..1afb105 100644 (file)
 
                interrupt-controller;
                #interrupt-cells = <2>;
-      };
+       };
+
+       pcie_clkreq: pcie-clkreq {
+               samsung,pins = "gpf4-2";
+               smausng,pin-function = <0>;
+               sansung,pin-pud = <0>;
+       };
+
+       pcie_wake: pcie-wake {
+               samsung,pins = "gpf1-0";
+               smausng,pin-function = <0>;
+               sansung,pin-pud = <0>;
+       };
+
+       wlan_apstatus: wlan_apstatus {
+               samsung,pins = "gpa0-2";
+               samsung,pin-function = <0>;
+               samsung,pin-pud = <1>;
+       };
+
+       wlan_wake: wlan-wake {
+               samsung,pins = "gpf3-2";
+               samsung,pin-function = <0>;
+               samsung,pin-pud = <0>;
+       };
+
+       wlan_host_wake: wlan-host-wake {
+               samsung,pins = "gpf3-1";
+               samsung,pin-function = <0xf>;
+               samsung,pin-pud = <1>;
+               samsung,pin-con-pdn = <3>;
+               samsung,pin-pud-pdn = <1>;
+       };
 };
 
 &pinctrl_aud {
                samsung,pins = "gpr3-4", "gpr3-5", "gpr3-6";
                samsung,pin-function = <3>;
                samsung,pin-pud = <3>;
+               samsung,pin-con-pud = <3>;
        };
 
        sd2_clk: sd2-clk {