firmware: Don't depend on PLAT_HART_COUNT and PLAT_HART_STACK_SIZE
authorAnup Patel <anup.patel@wdc.com>
Sat, 22 Dec 2018 07:10:54 +0000 (12:40 +0530)
committerAnup Patel <anup@brainfault.org>
Sat, 22 Dec 2018 15:19:52 +0000 (20:49 +0530)
The hart_count and hart_stack_size information is already available
in "struct sbi_platform" so we use that instead of depending on
PLAT_HART_COUNT and PLAT_HART_STACK_SIZE.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
firmware/fw_common.S
include/sbi/riscv_asm.h

index 4c11e85..d426f15 100644 (file)
@@ -132,8 +132,9 @@ _start_warm:
         * s8 -> HART Stack Size
         */
        csrr    s6, mhartid
-       li      s7, PLAT_HART_COUNT
-       li      s8, PLAT_HART_STACK_SIZE
+       la      a4, platform
+       lwu     s7, RISCV_PLATFORM_HART_COUNT_OFFSET(a4)
+       lwu     s8, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(a4)
 
        /* HART ID should be within expected limit */
        csrr    s6, mhartid
@@ -202,8 +203,9 @@ _hartid_to_scratch:
         * s1 -> HART Stack End
         * s2 -> Temporary
         */
-       li      s0, PLAT_HART_STACK_SIZE
-       li      s2, PLAT_HART_COUNT
+       la      s2, platform
+       lwu     s0, RISCV_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
+       lwu     s2, RISCV_PLATFORM_HART_COUNT_OFFSET(s2)
        mul     s2, s2, s0
        la      s1, _fw_end
        add     s1, s1, s2
index 516bf6f..045310b 100644 (file)
 #define RISCV_SCRATCH_IPI_TYPE_OFFSET          (9 * __SIZEOF_POINTER__)
 #define RISCV_SCRATCH_SIZE                     256
 
+#define RISCV_PLATFORM_NAME_OFFSET             (0x0)
+#define RISCV_PLATFORM_FEATURES_OFFSET         (0x40)
+#define RISCV_PLATFORM_HART_COUNT_OFFSET       (0x48)
+#define RISCV_PLATFORM_HART_STACK_SIZE_OFFSET  (0x4c)
+
 #define RISCV_TRAP_REGS_zero                   0
 #define RISCV_TRAP_REGS_ra                     1
 #define RISCV_TRAP_REGS_sp                     2