riscv: dts: thead: Add TH1520 mmc controllers and sdhci clock

Add node for the fixed reference clock used for emmc and sdio nodes.
Add emmc node for the 1st dwcmshc instance which is typically connected
to an eMMC device. Add sdio0 node for the 2nd dwcmshc instance which is
typically connected to microSD slot. Add sdio1 node for the 3rd dwcmshc
instance which is typically connected to an SDIO WiFi module. The node
names are based on Table 1-2 C910/C906 memory map in the TH1520 System
User Manual.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
(cherry picked from commit a77f02e8489673cc80948a6f30ed262db1dee8d6)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Change-Id: I9f95a1c539b96c23297eec6b9fdb0f0980820f74

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index ba4d2c673ac8d33e229765bfdcff674aaf40f93c..8b915e206f3a01a1f7cfb5a3a78217b3df2e26a0 100644 (file)
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -146,6 +146,13 @@
                #clock-cells = <0>;
        };
 
+       sdhci_clk: sdhci-clock {
+               compatible = "fixed-clock";
+               clock-frequency = <198000000>;
+               clock-output-names = "sdhci_clk";
+               #clock-cells = <0>;
+       };
+
        soc {
                compatible = "simple-bus";
                interrupt-parent = <&plic>;
@@ -304,6 +311,33 @@
                        status = "disabled";
                };
 
+               emmc: mmc@ffe7080000 {
+                       compatible = "thead,th1520-dwcmshc";
+                       reg = <0xff 0xe7080000 0x0 0x10000>;
+                       interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&sdhci_clk>;
+                       clock-names = "core";
+                       status = "disabled";
+               };
+
+               sdio0: mmc@ffe7090000 {
+                       compatible = "thead,th1520-dwcmshc";
+                       reg = <0xff 0xe7090000 0x0 0x10000>;
+                       interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&sdhci_clk>;
+                       clock-names = "core";
+                       status = "disabled";
+               };
+
+               sdio1: mmc@ffe70a0000 {
+                       compatible = "thead,th1520-dwcmshc";
+                       reg = <0xff 0xe70a0000 0x0 0x10000>;
+                       interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&sdhci_clk>;
+                       clock-names = "core";
+                       status = "disabled";
+               };
+
                timer0: timer@ffefc32000 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc32000 0x0 0x14>;