The VEC ADD and VEC MUL units aren't present on port 5 on SkylakeClient.
llvm-svn: 328241
"ADDSSrr",
"ADDSUBPDrr",
"ADDSUBPSrr",
- "MULPDrr",
- "MULPSrr",
- "MULSDrr",
- "MULSSrr",
- "SUBPDrr",
- "SUBPSrr",
- "SUBSDrr",
- "SUBSSrr",
- "VADDPDYrr",
- "VADDPDrr",
- "VADDPSYrr",
- "VADDPSrr",
- "VADDSDrr",
- "VADDSSrr",
- "VADDSUBPDYrr",
- "VADDSUBPDrr",
- "VADDSUBPSYrr",
- "VADDSUBPSrr",
- "VMULPDYrr",
- "VMULPDrr",
- "VMULPSYrr",
- "VMULPSrr",
- "VMULSDrr",
- "VMULSSrr",
- "VSUBPDYrr",
- "VSUBPDrr",
- "VSUBPSYrr",
- "VSUBPSrr",
- "VSUBSDrr",
- "VSUBSSrr")>;
-def: InstRW<[SKLWriteResGroup48],
- (instregex
- "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)(Y)?r",
- "VF(N)?M(ADD|SUB)(132|213|231)S(D|S)r")>;
-
-def SKLWriteResGroup49 : SchedWriteRes<[SKLPort015]> {
- let Latency = 4;
- let NumMicroOps = 1;
- let ResourceCycles = [1];
-}
-def: InstRW<[SKLWriteResGroup49], (instregex "CMPPDrri",
+ "CMPPDrri",
"CMPPSrri",
"CMPSDrr",
"CMPSSrr",
"MIN(C?)PSrr",
"MIN(C?)SDrr",
"MIN(C?)SSrr",
+ "MULPDrr",
+ "MULPSrr",
+ "MULSDrr",
+ "MULSSrr",
"PHMINPOSUWrr",
"PMADDUBSWrr",
"PMADDWDrr",
"PMULHWrr",
"PMULLWrr",
"PMULUDQrr",
+ "SUBPDrr",
+ "SUBPSrr",
+ "SUBSDrr",
+ "SUBSSrr",
+ "VADDPDYrr",
+ "VADDPDrr",
+ "VADDPSYrr",
+ "VADDPSrr",
+ "VADDSDrr",
+ "VADDSSrr",
+ "VADDSUBPDYrr",
+ "VADDSUBPDrr",
+ "VADDSUBPSYrr",
+ "VADDSUBPSrr",
"VCMPPDYrri",
"VCMPPDrri",
"VCMPPSYrri",
"VMIN(C?)PSrr",
"VMIN(C?)SDrr",
"VMIN(C?)SSrr",
+ "VMULPDYrr",
+ "VMULPDrr",
+ "VMULPSYrr",
+ "VMULPSrr",
+ "VMULSDrr",
+ "VMULSSrr",
"VPHMINPOSUWrr",
"VPMADDUBSWYrr",
"VPMADDUBSWrr",
"VPMULLWYrr",
"VPMULLWrr",
"VPMULUDQYrr",
- "VPMULUDQrr")>;
+ "VPMULUDQrr",
+ "VSUBPDYrr",
+ "VSUBPDrr",
+ "VSUBPSYrr",
+ "VSUBPSrr",
+ "VSUBSDrr",
+ "VSUBSSrr")>;
+def: InstRW<[SKLWriteResGroup48],
+ (instregex
+ "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)(Y)?r",
+ "VF(N)?M(ADD|SUB)(132|213|231)S(D|S)r")>;
def SKLWriteResGroup50 : SchedWriteRes<[SKLPort5]> {
let Latency = 4;
"MMX_PSUBUSBirm",
"MMX_PSUBUSWirm")>;
-def SKLWriteResGroup70 : SchedWriteRes<[SKLPort0,SKLPort015]> {
+def SKLWriteResGroup70 : SchedWriteRes<[SKLPort0,SKLPort01]> {
let Latency = 6;
let NumMicroOps = 2;
let ResourceCycles = [1,1];
"VHSUBPSYrr",
"VHSUBPSrr")>;
-def SKLWriteResGroup78 : SchedWriteRes<[SKLPort5,SKLPort015]> {
+def SKLWriteResGroup78 : SchedWriteRes<[SKLPort5,SKLPort01]> {
let Latency = 6;
let NumMicroOps = 3;
let ResourceCycles = [2,1];
}
def: InstRW<[SKLWriteResGroup80], (instregex "SLDT(16|32|64)r")>;
-def SKLWriteResGroup81 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237,SKLPort015]> {
+def SKLWriteResGroup81 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237,SKLPort01]> {
let Latency = 6;
let NumMicroOps = 4;
let ResourceCycles = [1,1,1,1];
"VUNPCKLPDrm",
"VUNPCKLPSrm")>;
-def SKLWriteResGroup89 : SchedWriteRes<[SKLPort5,SKLPort015]> {
+def SKLWriteResGroup89 : SchedWriteRes<[SKLPort5,SKLPort01]> {
let Latency = 7;
let NumMicroOps = 2;
let ResourceCycles = [1,1];
"SCASQ",
"SCASW")>;
-def SKLWriteResGroup95 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort015]> {
+def SKLWriteResGroup95 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort01]> {
let Latency = 7;
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
def: InstRW<[SKLWriteResGroup103], (instrs LOOP)>;
-def SKLWriteResGroup105 : SchedWriteRes<[SKLPort015]> {
+def SKLWriteResGroup105 : SchedWriteRes<[SKLPort01]> {
let Latency = 8;
let NumMicroOps = 2;
let ResourceCycles = [2];
"MMX_PHSUBDrm",
"MMX_PHSUBWrm")>;
-def SKLWriteResGroup114 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237,SKLPort015]> {
+def SKLWriteResGroup114 : SchedWriteRes<[SKLPort4,SKLPort5,SKLPort237,SKLPort01]> {
let Latency = 8;
let NumMicroOps = 4;
let ResourceCycles = [1,1,1,1];
}
def: InstRW<[SKLWriteResGroup122], (instregex "ADDSDrm",
"ADDSSrm",
+ "CMPSDrm",
+ "CMPSSrm",
+ "MAX(C?)SDrm",
+ "MAX(C?)SSrm",
+ "MIN(C?)SDrm",
+ "MIN(C?)SSrm",
"MULSDrm",
"MULSSrm",
"SUBSDrm",
"SUBSSrm",
"VADDSDrm",
"VADDSSrm",
+ "VCMPSDrm",
+ "VCMPSSrm",
+ "VMAX(C?)SDrm",
+ "VMAX(C?)SSrm",
+ "VMIN(C?)SDrm",
+ "VMIN(C?)SSrm",
"VMULSDrm",
"VMULSSrm",
"VSUBSDrm",
def: InstRW<[SKLWriteResGroup122],
(instregex "VF(N)?M(ADD|SUB)(132|213|231)S(D|S)m")>;
-def SKLWriteResGroup123 : SchedWriteRes<[SKLPort23,SKLPort015]> {
+def SKLWriteResGroup123 : SchedWriteRes<[SKLPort23,SKLPort01]> {
let Latency = 9;
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SKLWriteResGroup123], (instregex "CMPSDrm",
- "CMPSSrm",
- "CVTPS2PDrm",
- "MAX(C?)SDrm",
- "MAX(C?)SSrm",
- "MIN(C?)SDrm",
- "MIN(C?)SSrm",
+def: InstRW<[SKLWriteResGroup123], (instregex "CVTPS2PDrm",
"MMX_CVTPS2PIirm",
"MMX_CVTTPS2PIirm",
- "VCMPSDrm",
- "VCMPSSrm",
"VCVTPH2PSrm",
- "VCVTPS2PDrm",
- "VMAX(C?)SDrm",
- "VMAX(C?)SSrm",
- "VMIN(C?)SDrm",
- "VMIN(C?)SSrm")>;
+ "VCVTPS2PDrm")>;
-def SKLWriteResGroup124 : SchedWriteRes<[SKLPort5,SKLPort015]> {
+def SKLWriteResGroup124 : SchedWriteRes<[SKLPort5,SKLPort01]> {
let Latency = 9;
let NumMicroOps = 3;
let ResourceCycles = [1,2];
"ADDPSrm",
"ADDSUBPDrm",
"ADDSUBPSrm",
- "MULPDrm",
- "MULPSrm",
- "SUBPDrm",
- "SUBPSrm",
- "VADDPDrm",
- "VADDPSrm",
- "VADDSUBPDrm",
- "VADDSUBPSrm",
- "VMULPDrm",
- "VMULPSrm",
- "VSUBPDrm",
- "VSUBPSrm")>;
-def: InstRW<[SKLWriteResGroup134],
- (instregex "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)m")>;
-
-def SKLWriteResGroup135 : SchedWriteRes<[SKLPort23,SKLPort015]> {
- let Latency = 10;
- let NumMicroOps = 2;
- let ResourceCycles = [1,1];
-}
-def: InstRW<[SKLWriteResGroup135], (instregex "CMPPDrmi",
+ "CMPPDrmi",
"CMPPSrmi",
"CVTDQ2PSrm",
"CVTPS2DQrm",
"MAX(C?)PSrm",
"MIN(C?)PDrm",
"MIN(C?)PSrm",
+ "MULPDrm",
+ "MULPSrm",
"PHMINPOSUWrm",
"PMADDUBSWrm",
"PMADDWDrm",
"PMULHWrm",
"PMULLWrm",
"PMULUDQrm",
+ "SUBPDrm",
+ "SUBPSrm",
+ "VADDPDrm",
+ "VADDPSrm",
+ "VADDSUBPDrm",
+ "VADDSUBPSrm",
"VCMPPDrmi",
"VCMPPSrmi",
"VCVTDQ2PSrm",
"VMAX(C?)PSrm",
"VMIN(C?)PDrm",
"VMIN(C?)PSrm",
+ "VMULPDrm",
+ "VMULPSrm",
"VPHMINPOSUWrm",
"VPMADDUBSWrm",
"VPMADDWDrm",
"VPMULHUWrm",
"VPMULHWrm",
"VPMULLWrm",
- "VPMULUDQrm")>;
+ "VPMULUDQrm",
+ "VSUBPDrm",
+ "VSUBPSrm")>;
+def: InstRW<[SKLWriteResGroup134],
+ (instregex "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)m")>;
def SKLWriteResGroup137 : SchedWriteRes<[SKLPort5,SKLPort23]> {
let Latency = 10;
def: InstRW<[SKLWriteResGroup138], (instregex "MMX_CVTPI2PDirm",
"VPTESTYrm")>;
-def SKLWriteResGroup139 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
+def SKLWriteResGroup139 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort01]> {
let Latency = 10;
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
"VADDPSYrm",
"VADDSUBPDYrm",
"VADDSUBPSYrm",
- "VMULPDYrm",
- "VMULPSYrm",
- "VSUBPDYrm",
- "VSUBPSYrm")>;
-def: InstRW<[SKLWriteResGroup147],
- (instregex "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)Ym")>;
-
-def SKLWriteResGroup148 : SchedWriteRes<[SKLPort23,SKLPort015]> {
- let Latency = 11;
- let NumMicroOps = 2;
- let ResourceCycles = [1,1];
-}
-def: InstRW<[SKLWriteResGroup148], (instregex "VCMPPDYrmi",
+ "VCMPPDYrmi",
"VCMPPSYrmi",
"VCVTDQ2PSYrm",
"VCVTPS2DQYrm",
"VMAX(C?)PSYrm",
"VMIN(C?)PDYrm",
"VMIN(C?)PSYrm",
+ "VMULPDYrm",
+ "VMULPSYrm",
"VPMADDUBSWYrm",
"VPMADDWDYrm",
"VPMULDQYrm",
"VPMULHUWYrm",
"VPMULHWYrm",
"VPMULLWYrm",
- "VPMULUDQYrm")>;
+ "VPMULUDQYrm",
+ "VSUBPDYrm",
+ "VSUBPSYrm")>;
+def: InstRW<[SKLWriteResGroup147],
+ (instregex "VF(N)?M(ADD|SUB|ADDSUB|SUBADD)(132|213|231)P(D|S)Ym")>;
def SKLWriteResGroup149 : SchedWriteRes<[SKLPort5,SKLPort23]> {
let Latency = 11;
}
def: InstRW<[SKLWriteResGroup150], (instregex "(V?)CVTDQ2PDrm")>;
-def SKLWriteResGroup151 : SchedWriteRes<[SKLPort0,SKLPort23,SKLPort015]> {
+def SKLWriteResGroup151 : SchedWriteRes<[SKLPort0,SKLPort23,SKLPort01]> {
let Latency = 11;
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
"VCVTTSS2SI64rm",
"VCVTTSS2SIrm")>;
-def SKLWriteResGroup152 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
+def SKLWriteResGroup152 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort01]> {
let Latency = 11;
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
"(V?)HSUBPDrm",
"(V?)HSUBPSrm")>;
-def SKLWriteResGroup160 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23,SKLPort015]> {
+def SKLWriteResGroup160 : SchedWriteRes<[SKLPort0,SKLPort5,SKLPort23,SKLPort01]> {
let Latency = 12;
let NumMicroOps = 4;
let ResourceCycles = [1,1,1,1];
}
def: InstRW<[SKLWriteResGroup163], (instregex "VCVTDQ2PDYrm")>;
-def SKLWriteResGroup164 : SchedWriteRes<[SKLPort5,SKLPort015]> {
+def SKLWriteResGroup164 : SchedWriteRes<[SKLPort5,SKLPort01]> {
let Latency = 13;
let NumMicroOps = 4;
let ResourceCycles = [1,3];
"VDIVPDrr",
"VDIVSDrr")>;
-def SKLWriteResGroup168 : SchedWriteRes<[SKLPort23,SKLPort015]> {
+def SKLWriteResGroup168 : SchedWriteRes<[SKLPort23,SKLPort01]> {
let Latency = 14;
let NumMicroOps = 3;
let ResourceCycles = [1,2];
"DIVR_FST0r",
"DIVR_FrST0")>;
-def SKLWriteResGroup172 : SchedWriteRes<[SKLPort23,SKLPort015]> {
+def SKLWriteResGroup172 : SchedWriteRes<[SKLPort23,SKLPort01]> {
let Latency = 15;
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
def: InstRW<[SKLWriteResGroup172_2], (instregex "VPMULLDYrm")>;
-def SKLWriteResGroup173 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
+def SKLWriteResGroup173 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort01]> {
let Latency = 15;
let NumMicroOps = 4;
let ResourceCycles = [1,1,2];
"VDIVSDrm",
"VSQRTPSYm")>;
-def SKLWriteResGroup187 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
+def SKLWriteResGroup187 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort01]> {
let Latency = 19;
let NumMicroOps = 5;
let ResourceCycles = [1,1,3];
}
def: InstRW<[SKLWriteResGroup190], (instregex "(V?)DIVPDrm")>;
-def SKLWriteResGroup191 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort015]> {
+def SKLWriteResGroup191 : SchedWriteRes<[SKLPort5,SKLPort23,SKLPort01]> {
let Latency = 20;
let NumMicroOps = 5;
let ResourceCycles = [1,1,3];
;
; SKYLAKE-LABEL: test_cmppd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm1 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm1 # sched: [4:0.50]
; SKYLAKE-NEXT: vcmpeqpd (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: vorpd %ymm0, %ymm1, %ymm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cmpps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcmpeqps %ymm1, %ymm0, %ymm1 # sched: [4:0.50]
; SKYLAKE-NEXT: vcmpeqps (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: vorps %ymm0, %ymm1, %ymm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvtdq2ps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcvtdq2ps %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcvtdq2ps %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcvtdq2ps (%rdi), %ymm1 # sched: [11:0.50]
; SKYLAKE-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvtps2dq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcvtps2dq %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcvtps2dq %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcvtps2dq (%rdi), %ymm1 # sched: [11:0.50]
; SKYLAKE-NEXT: vorpd %ymm1, %ymm0, %ymm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvttps2dq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcvttps2dq %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcvttps2dq %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcvttps2dq (%rdi), %ymm1 # sched: [11:0.50]
; SKYLAKE-NEXT: vorps %ymm1, %ymm0, %ymm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_dpps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 # sched: [13:1.33]
-; SKYLAKE-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [20:1.33]
+; SKYLAKE-NEXT: vdpps $7, %ymm1, %ymm0, %ymm0 # sched: [13:1.50]
+; SKYLAKE-NEXT: vdpps $7, (%rdi), %ymm0, %ymm0 # sched: [20:1.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_dpps:
;
; SKYLAKE-LABEL: test_maxpd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vmaxpd %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vmaxpd (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_maxps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmaxps %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vmaxps %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vmaxps (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_minpd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vminpd %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vminpd %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vminpd (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_minps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vminps %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vminps %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vminps (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_roundpd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [8:0.67]
-; SKYLAKE-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [15:0.67]
+; SKYLAKE-NEXT: vroundpd $7, %ymm0, %ymm0 # sched: [8:1.00]
+; SKYLAKE-NEXT: vroundpd $7, (%rdi), %ymm1 # sched: [15:1.00]
; SKYLAKE-NEXT: vaddpd %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_roundps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [8:0.67]
-; SKYLAKE-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [15:0.67]
+; SKYLAKE-NEXT: vroundps $7, %ymm0, %ymm0 # sched: [8:1.00]
+; SKYLAKE-NEXT: vroundps $7, (%rdi), %ymm1 # sched: [15:1.00]
; SKYLAKE-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmaddubsw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmaddubsw %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmaddubsw (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmaddwd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmaddwd %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmaddwd (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmuldq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmuldq %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmuldq %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmuldq (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmulhrsw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmulhrsw %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmulhrsw (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmulhuw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmulhuw %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmulhuw (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmulhw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmulhw %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmulhw (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmullw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmullw %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmullw %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmullw (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmuludq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmuludq (%rdi), %ymm0, %ymm0 # sched: [11:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_cmpps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcmpeqps %xmm1, %xmm0, %xmm1 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcmpeqps %xmm1, %xmm0, %xmm1 # sched: [4:0.50]
; SKYLAKE-NEXT: vcmpeqps (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: vorps %xmm0, %xmm1, %xmm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cmpss:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcmpeqss %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcmpeqss (%rdi), %xmm0, %xmm0 # sched: [9:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_maxps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmaxps %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vmaxps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vmaxps (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_maxss:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmaxss %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vmaxss %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vmaxss (%rdi), %xmm0, %xmm0 # sched: [9:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_minps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vminps %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vminps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vminps (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_minss:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vminss %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vminss %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vminss (%rdi), %xmm0, %xmm0 # sched: [9:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; ATOM-LABEL: test_rcpss:
; ATOM: # %bb.0:
; ATOM-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [1:1.00]
-; ATOM-NEXT: rcpss %xmm0, %xmm0
-; ATOM-NEXT: rcpss %xmm1, %xmm1
+; ATOM-NEXT: rcpss %xmm0, %xmm0 # sched: [0:?]
+; ATOM-NEXT: rcpss %xmm1, %xmm1 # sched: [0:?]
; ATOM-NEXT: addps %xmm1, %xmm0 # sched: [5:5.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; ATOM-LABEL: test_rsqrtss:
; ATOM: # %bb.0:
; ATOM-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [1:1.00]
-; ATOM-NEXT: rsqrtss %xmm0, %xmm0
-; ATOM-NEXT: rsqrtss %xmm1, %xmm1
+; ATOM-NEXT: rsqrtss %xmm0, %xmm0 # sched: [0:?]
+; ATOM-NEXT: rsqrtss %xmm1, %xmm1 # sched: [0:?]
; ATOM-NEXT: addps %xmm1, %xmm0 # sched: [5:5.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; ATOM-LABEL: test_sqrtss:
; ATOM: # %bb.0:
; ATOM-NEXT: movaps (%rdi), %xmm1 # sched: [1:1.00]
-; ATOM-NEXT: sqrtss %xmm0, %xmm0
-; ATOM-NEXT: sqrtss %xmm1, %xmm1
+; ATOM-NEXT: sqrtss %xmm0, %xmm0 # sched: [0:?]
+; ATOM-NEXT: sqrtss %xmm1, %xmm1 # sched: [0:?]
; ATOM-NEXT: addps %xmm1, %xmm0 # sched: [5:5.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
;
; SKYLAKE-LABEL: test_cmppd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm1 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm1 # sched: [4:0.50]
; SKYLAKE-NEXT: vcmpeqpd (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: vorpd %xmm0, %xmm1, %xmm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cmpsd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcmpeqsd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcmpeqsd (%rdi), %xmm0, %xmm0 # sched: [9:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_cvtdq2ps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcvtdq2ps %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcvtdq2ps %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcvtdq2ps (%rdi), %xmm1 # sched: [10:0.50]
; SKYLAKE-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvtps2dq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcvtps2dq %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcvtps2dq %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcvtps2dq (%rdi), %xmm1 # sched: [10:0.50]
; SKYLAKE-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvttps2dq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vcvttps2dq %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vcvttps2dq %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vcvttps2dq (%rdi), %xmm1 # sched: [10:0.50]
; SKYLAKE-NEXT: vpaddd %xmm1, %xmm0, %xmm0 # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_maxpd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vmaxpd (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_maxsd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vmaxsd (%rdi), %xmm0, %xmm0 # sched: [9:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_minpd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vminpd %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vminpd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vminpd (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_minsd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vminsd %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vminsd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vminsd (%rdi), %xmm0, %xmm0 # sched: [9:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmaddwd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmaddwd (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmulhuw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmulhuw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmulhw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmulhw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmullw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmullw %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmullw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmullw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmuludq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmuludq (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; ATOM-LABEL: test_sqrtsd:
; ATOM: # %bb.0:
; ATOM-NEXT: movapd (%rdi), %xmm1 # sched: [1:1.00]
-; ATOM-NEXT: sqrtsd %xmm0, %xmm0
-; ATOM-NEXT: sqrtsd %xmm1, %xmm1
+; ATOM-NEXT: sqrtsd %xmm0, %xmm0 # sched: [0:?]
+; ATOM-NEXT: sqrtsd %xmm1, %xmm1 # sched: [0:?]
; ATOM-NEXT: addpd %xmm1, %xmm0 # sched: [6:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
;
; SKYLAKE-LABEL: test_dpps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [13:1.33]
-; SKYLAKE-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [19:1.33]
+; SKYLAKE-NEXT: vdpps $7, %xmm1, %xmm0, %xmm0 # sched: [13:1.50]
+; SKYLAKE-NEXT: vdpps $7, (%rdi), %xmm0, %xmm0 # sched: [19:1.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_dpps:
; SKYLAKE-LABEL: test_phminposuw:
; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: vphminposuw (%rdi), %xmm0 # sched: [10:0.50]
-; SKYLAKE-NEXT: vphminposuw %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vphminposuw %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phminposuw:
;
; SKYLAKE-LABEL: test_pmuldq:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmuldq (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_roundpd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [8:0.67]
-; SKYLAKE-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [14:0.67]
+; SKYLAKE-NEXT: vroundpd $7, %xmm0, %xmm0 # sched: [8:1.00]
+; SKYLAKE-NEXT: vroundpd $7, (%rdi), %xmm1 # sched: [14:1.00]
; SKYLAKE-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_roundps:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [8:0.67]
-; SKYLAKE-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [14:0.67]
+; SKYLAKE-NEXT: vroundps $7, %xmm0, %xmm0 # sched: [8:1.00]
+; SKYLAKE-NEXT: vroundps $7, (%rdi), %xmm1 # sched: [14:1.00]
; SKYLAKE-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_roundsd:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [8:0.67]
-; SKYLAKE-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [14:0.67]
+; SKYLAKE-NEXT: vroundsd $7, %xmm1, %xmm0, %xmm1 # sched: [8:1.00]
+; SKYLAKE-NEXT: vroundsd $7, (%rdi), %xmm0, %xmm0 # sched: [14:1.00]
; SKYLAKE-NEXT: vaddpd %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_roundss:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [8:0.67]
-; SKYLAKE-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [14:0.67]
+; SKYLAKE-NEXT: vroundss $7, %xmm1, %xmm0, %xmm1 # sched: [8:1.00]
+; SKYLAKE-NEXT: vroundss $7, (%rdi), %xmm0, %xmm0 # sched: [14:1.00]
; SKYLAKE-NEXT: vaddps %xmm0, %xmm1, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmaddubsw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmaddubsw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmaddubsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
;
; SKYLAKE-LABEL: test_pmulhrsw:
; SKYLAKE: # %bb.0:
-; SKYLAKE-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
+; SKYLAKE-NEXT: vpmulhrsw %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: vpmulhrsw (%rdi), %xmm0, %xmm0 # sched: [10:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;