drm/amdgpu: use VRAM|GTT for a bunch of kernel allocations
authorChristian König <christian.koenig@amd.com>
Fri, 14 Jan 2022 15:49:44 +0000 (16:49 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 3 Jan 2023 21:49:54 +0000 (16:49 -0500)
Technically all of those can use GTT as well, no need to force things
into VRAM.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
18 files changed:
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c

index 6b74df4..2eef109 100644 (file)
@@ -755,6 +755,11 @@ struct amdgpu_mqd {
 #define AMDGPU_PRODUCT_NAME_LEN 64
 struct amdgpu_reset_domain;
 
+/*
+ * Non-zero (true) if the GPU has VRAM. Zero (false) otherwise.
+ */
+#define AMDGPU_HAS_VRAM(_adev) ((_adev)->gmc.real_vram_size)
+
 struct amdgpu_device {
        struct device                   *dev;
        struct pci_dev                  *pdev;
index 89e09f0..8625af2 100644 (file)
@@ -934,7 +934,8 @@ static int amdgpu_device_asic_init(struct amdgpu_device *adev)
 static int amdgpu_device_vram_scratch_init(struct amdgpu_device *adev)
 {
        return amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_SIZE,
-                                      PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+                                      PAGE_SIZE,
+                                      AMDGPU_GEM_DOMAIN_VRAM,
                                       &adev->vram_scratch.robj,
                                       &adev->vram_scratch.gpu_addr,
                                       (void **)&adev->vram_scratch.ptr);
@@ -2410,8 +2411,9 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
                        /* right after GMC hw init, we create CSA */
                        if (amdgpu_mcbp) {
                                r = amdgpu_allocate_static_csa(adev, &adev->virt.csa_obj,
-                                                               AMDGPU_GEM_DOMAIN_VRAM,
-                                                               AMDGPU_CSA_SIZE);
+                                                              AMDGPU_GEM_DOMAIN_VRAM |
+                                                              AMDGPU_GEM_DOMAIN_GTT,
+                                                              AMDGPU_CSA_SIZE);
                                if (r) {
                                        DRM_ERROR("allocate CSA failed %d\n", r);
                                        goto init_failed;
index 23692e5..42a939c 100644 (file)
@@ -372,8 +372,11 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
                 * KIQ MQD no matter SRIOV or Bare-metal
                 */
                r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
-                                           AMDGPU_GEM_DOMAIN_VRAM, &ring->mqd_obj,
-                                           &ring->mqd_gpu_addr, &ring->mqd_ptr);
+                                           AMDGPU_GEM_DOMAIN_VRAM |
+                                           AMDGPU_GEM_DOMAIN_GTT,
+                                           &ring->mqd_obj,
+                                           &ring->mqd_gpu_addr,
+                                           &ring->mqd_ptr);
                if (r) {
                        dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r);
                        return r;
index 7a2fc92..0706afb 100644 (file)
@@ -66,7 +66,8 @@ static int psp_ring_init(struct psp_context *psp,
        /* allocate 4k Page of Local Frame Buffer memory for ring */
        ring->ring_size = 0x1000;
        ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE,
-                                     AMDGPU_GEM_DOMAIN_VRAM,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->firmware.rbuf,
                                      &ring->ring_mem_mc_addr,
                                      (void **)&ring->ring_mem);
@@ -797,9 +798,13 @@ static int psp_tmr_init(struct psp_context *psp)
 
        if (!psp->tmr_bo) {
                pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
-               ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT,
-                                             AMDGPU_GEM_DOMAIN_VRAM,
-                                             &psp->tmr_bo, &psp->tmr_mc_addr, pptr);
+               ret = amdgpu_bo_create_kernel(psp->adev, tmr_size,
+                                             PSP_TMR_ALIGNMENT,
+                                             AMDGPU_HAS_VRAM(psp->adev) ?
+                                             AMDGPU_GEM_DOMAIN_VRAM :
+                                             AMDGPU_GEM_DOMAIN_GTT,
+                                             &psp->tmr_bo, &psp->tmr_mc_addr,
+                                             pptr);
        }
 
        return ret;
@@ -1092,7 +1097,8 @@ int psp_ta_init_shared_buf(struct psp_context *psp,
        * physical) for ta to host memory
        */
        return amdgpu_bo_create_kernel(psp->adev, mem_ctx->shared_mem_size,
-                                     PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+                                     PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &mem_ctx->shared_bo,
                                      &mem_ctx->shared_mc_addr,
                                      &mem_ctx->shared_buf);
@@ -3444,10 +3450,10 @@ static ssize_t psp_usbc_pd_fw_sysfs_write(struct device *dev,
 
        /* LFB address which is aligned to 1MB boundary per PSP request */
        ret = amdgpu_bo_create_kernel(adev, usbc_pd_fw->size, 0x100000,
-                                               AMDGPU_GEM_DOMAIN_VRAM,
-                                               &fw_buf_bo,
-                                               &fw_pri_mc_addr,
-                                               &fw_pri_cpu_addr);
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
+                                     &fw_buf_bo, &fw_pri_mc_addr,
+                                     &fw_pri_cpu_addr);
        if (ret)
                goto rel_buf;
 
index 012b72d..85fb730 100644 (file)
@@ -93,7 +93,8 @@ int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws)
 
        /* allocate save restore block */
        r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
-                                     AMDGPU_GEM_DOMAIN_VRAM,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.rlc.save_restore_obj,
                                      &adev->gfx.rlc.save_restore_gpu_addr,
                                      (void **)&adev->gfx.rlc.sr_ptr);
@@ -130,7 +131,8 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
        /* allocate clear state block */
        adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev);
        r = amdgpu_bo_create_kernel(adev, dws * 4, PAGE_SIZE,
-                                     AMDGPU_GEM_DOMAIN_VRAM,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.rlc.clear_state_obj,
                                      &adev->gfx.rlc.clear_state_gpu_addr,
                                      (void **)&adev->gfx.rlc.cs_ptr);
@@ -156,7 +158,8 @@ int amdgpu_gfx_rlc_init_cpt(struct amdgpu_device *adev)
        int r;
 
        r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size,
-                                     PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+                                     PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.rlc.cp_table_obj,
                                      &adev->gfx.rlc.cp_table_gpu_addr,
                                      (void **)&adev->gfx.rlc.cp_table_ptr);
index 55e0284..3c16dcc 100644 (file)
@@ -1679,10 +1679,10 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
                /* reserve vram for mem train according to TMR location */
                amdgpu_ttm_training_data_block_init(adev);
                ret = amdgpu_bo_create_kernel_at(adev,
-                                        ctx->c2p_train_data_offset,
-                                        ctx->train_data_size,
-                                        &ctx->c2p_bo,
-                                        NULL);
+                                                ctx->c2p_train_data_offset,
+                                                ctx->train_data_size,
+                                                &ctx->c2p_bo,
+                                                NULL);
                if (ret) {
                        DRM_ERROR("alloc c2p_bo failed(%d)!\n", ret);
                        amdgpu_ttm_training_reserve_vram_fini(adev);
@@ -1692,10 +1692,10 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
        }
 
        ret = amdgpu_bo_create_kernel_at(adev,
-                               adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
-                               adev->mman.discovery_tmr_size,
-                               &adev->mman.discovery_memory,
-                               NULL);
+                                        adev->gmc.real_vram_size - adev->mman.discovery_tmr_size,
+                                        adev->mman.discovery_tmr_size,
+                                        &adev->mman.discovery_memory,
+                                        NULL);
        if (ret) {
                DRM_ERROR("alloc tmr failed(%d)!\n", ret);
                amdgpu_bo_free_kernel(&adev->mman.discovery_memory, NULL, NULL);
index e00bb65..a2204eb 100644 (file)
@@ -331,8 +331,11 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
                if (adev->uvd.harvest_config & (1 << j))
                        continue;
                r = amdgpu_bo_create_kernel(adev, bo_size, PAGE_SIZE,
-                                           AMDGPU_GEM_DOMAIN_VRAM, &adev->uvd.inst[j].vcpu_bo,
-                                           &adev->uvd.inst[j].gpu_addr, &adev->uvd.inst[j].cpu_addr);
+                                           AMDGPU_GEM_DOMAIN_VRAM |
+                                           AMDGPU_GEM_DOMAIN_GTT,
+                                           &adev->uvd.inst[j].vcpu_bo,
+                                           &adev->uvd.inst[j].gpu_addr,
+                                           &adev->uvd.inst[j].cpu_addr);
                if (r) {
                        dev_err(adev->dev, "(%d) failed to allocate UVD bo\n", r);
                        return r;
index b239e87..7d93e39 100644 (file)
@@ -186,7 +186,9 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size)
                                (binary_id << 8));
 
        r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
-                                   AMDGPU_GEM_DOMAIN_VRAM, &adev->vce.vcpu_bo,
+                                   AMDGPU_GEM_DOMAIN_VRAM |
+                                   AMDGPU_GEM_DOMAIN_GTT,
+                                   &adev->vce.vcpu_bo,
                                    &adev->vce.gpu_addr, &adev->vce.cpu_addr);
        if (r) {
                dev_err(adev->dev, "(%d) failed to allocate VCE bo\n", r);
index c9cee1c..1c5bd07 100644 (file)
@@ -274,8 +274,11 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
                        continue;
 
                r = amdgpu_bo_create_kernel(adev, bo_size, PAGE_SIZE,
-                                               AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].vcpu_bo,
-                                               &adev->vcn.inst[i].gpu_addr, &adev->vcn.inst[i].cpu_addr);
+                                           AMDGPU_GEM_DOMAIN_VRAM |
+                                           AMDGPU_GEM_DOMAIN_GTT,
+                                           &adev->vcn.inst[i].vcpu_bo,
+                                           &adev->vcn.inst[i].gpu_addr,
+                                           &adev->vcn.inst[i].cpu_addr);
                if (r) {
                        dev_err(adev->dev, "(%d) failed to allocate vcn bo\n", r);
                        return r;
@@ -296,8 +299,11 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
 
                if (adev->vcn.indirect_sram) {
                        r = amdgpu_bo_create_kernel(adev, 64 * 2 * 4, PAGE_SIZE,
-                                       AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].dpg_sram_bo,
-                                       &adev->vcn.inst[i].dpg_sram_gpu_addr, &adev->vcn.inst[i].dpg_sram_cpu_addr);
+                                       AMDGPU_GEM_DOMAIN_VRAM |
+                                       AMDGPU_GEM_DOMAIN_GTT,
+                                       &adev->vcn.inst[i].dpg_sram_bo,
+                                       &adev->vcn.inst[i].dpg_sram_gpu_addr,
+                                       &adev->vcn.inst[i].dpg_sram_cpu_addr);
                        if (r) {
                                dev_err(adev->dev, "VCN %d (%d) failed to allocate DPG bo\n", i, r);
                                return r;
index 2994b9d..f39391e 100644 (file)
@@ -232,7 +232,8 @@ int amdgpu_virt_alloc_mm_table(struct amdgpu_device *adev)
                return 0;
 
        r = amdgpu_bo_create_kernel(adev, PAGE_SIZE, PAGE_SIZE,
-                                   AMDGPU_GEM_DOMAIN_VRAM,
+                                   AMDGPU_GEM_DOMAIN_VRAM |
+                                   AMDGPU_GEM_DOMAIN_GTT,
                                    &adev->virt.mm_table.bo,
                                    &adev->virt.mm_table.gpu_addr,
                                    (void *)&adev->virt.mm_table.cpu_addr);
index a56c6e1..259ebf0 100644 (file)
@@ -987,10 +987,11 @@ static int gfx_v11_0_rlc_autoload_buffer_init(struct amdgpu_device *adev)
        total_size = gfx_v11_0_calc_toc_total_size(adev);
 
        r = amdgpu_bo_create_reserved(adev, total_size, 64 * 1024,
-                       AMDGPU_GEM_DOMAIN_VRAM,
-                       &adev->gfx.rlc.rlc_autoload_bo,
-                       &adev->gfx.rlc.rlc_autoload_gpu_addr,
-                       (void **)&adev->gfx.rlc.rlc_autoload_ptr);
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
+                                     &adev->gfx.rlc.rlc_autoload_bo,
+                                     &adev->gfx.rlc.rlc_autoload_gpu_addr,
+                                     (void **)&adev->gfx.rlc.rlc_autoload_ptr);
 
        if (r) {
                dev_err(adev->dev, "(%d) failed to create fw autoload bo\n", r);
@@ -2649,7 +2650,9 @@ static int gfx_v11_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device *adev)
 
        /* 64kb align */
        r = amdgpu_bo_create_reserved(adev, fw_ucode_size,
-                                     64 * 1024, AMDGPU_GEM_DOMAIN_VRAM,
+                                     64 * 1024,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.pfp.pfp_fw_obj,
                                      &adev->gfx.pfp.pfp_fw_gpu_addr,
                                      (void **)&adev->gfx.pfp.pfp_fw_ptr);
@@ -2660,7 +2663,9 @@ static int gfx_v11_0_cp_gfx_load_pfp_microcode_rs64(struct amdgpu_device *adev)
        }
 
        r = amdgpu_bo_create_reserved(adev, fw_data_size,
-                                     64 * 1024, AMDGPU_GEM_DOMAIN_VRAM,
+                                     64 * 1024,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.pfp.pfp_fw_data_obj,
                                      &adev->gfx.pfp.pfp_fw_data_gpu_addr,
                                      (void **)&adev->gfx.pfp.pfp_fw_data_ptr);
@@ -2863,7 +2868,9 @@ static int gfx_v11_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device *adev)
 
        /* 64kb align*/
        r = amdgpu_bo_create_reserved(adev, fw_ucode_size,
-                                     64 * 1024, AMDGPU_GEM_DOMAIN_VRAM,
+                                     64 * 1024,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.me.me_fw_obj,
                                      &adev->gfx.me.me_fw_gpu_addr,
                                      (void **)&adev->gfx.me.me_fw_ptr);
@@ -2874,7 +2881,9 @@ static int gfx_v11_0_cp_gfx_load_me_microcode_rs64(struct amdgpu_device *adev)
        }
 
        r = amdgpu_bo_create_reserved(adev, fw_data_size,
-                                     64 * 1024, AMDGPU_GEM_DOMAIN_VRAM,
+                                     64 * 1024,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.me.me_fw_data_obj,
                                      &adev->gfx.me.me_fw_data_gpu_addr,
                                      (void **)&adev->gfx.me.me_fw_data_ptr);
@@ -3380,7 +3389,9 @@ static int gfx_v11_0_cp_compute_load_microcode_rs64(struct amdgpu_device *adev)
        fw_data_size = le32_to_cpu(mec_hdr->data_size_bytes);
 
        r = amdgpu_bo_create_reserved(adev, fw_ucode_size,
-                                     64 * 1024, AMDGPU_GEM_DOMAIN_VRAM,
+                                     64 * 1024,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.mec.mec_fw_obj,
                                      &adev->gfx.mec.mec_fw_gpu_addr,
                                      (void **)&fw_ucode_ptr);
@@ -3391,7 +3402,9 @@ static int gfx_v11_0_cp_compute_load_microcode_rs64(struct amdgpu_device *adev)
        }
 
        r = amdgpu_bo_create_reserved(adev, fw_data_size,
-                                     64 * 1024, AMDGPU_GEM_DOMAIN_VRAM,
+                                     64 * 1024,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.mec.mec_fw_data_obj,
                                      &adev->gfx.mec.mec_fw_data_gpu_addr,
                                      (void **)&fw_data_ptr);
index 204b246..e53a2a9 100644 (file)
@@ -2375,7 +2375,8 @@ static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)
                dws = adev->gfx.rlc.clear_state_size + (256 / 4);
 
                r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
-                                             AMDGPU_GEM_DOMAIN_VRAM,
+                                             AMDGPU_GEM_DOMAIN_VRAM |
+                                             AMDGPU_GEM_DOMAIN_GTT,
                                              &adev->gfx.rlc.clear_state_obj,
                                              &adev->gfx.rlc.clear_state_gpu_addr,
                                              (void **)&adev->gfx.rlc.cs_ptr);
index 0f29765..d9bbb54 100644 (file)
@@ -2772,7 +2772,8 @@ static int gfx_v7_0_mec_init(struct amdgpu_device *adev)
                * GFX7_MEC_HPD_SIZE * 2;
 
        r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
-                                     AMDGPU_GEM_DOMAIN_VRAM,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->gfx.mec.hpd_eop_obj,
                                      &adev->gfx.mec.hpd_eop_gpu_addr,
                                      (void **)&hpd);
index d471356..70bb42c 100644 (file)
@@ -1340,7 +1340,8 @@ static int gfx_v8_0_mec_init(struct amdgpu_device *adev)
        mec_hpd_size = adev->gfx.num_compute_rings * GFX8_MEC_HPD_SIZE;
        if (mec_hpd_size) {
                r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
-                                             AMDGPU_GEM_DOMAIN_VRAM,
+                                             AMDGPU_GEM_DOMAIN_VRAM |
+                                             AMDGPU_GEM_DOMAIN_GTT,
                                              &adev->gfx.mec.hpd_eop_obj,
                                              &adev->gfx.mec.hpd_eop_gpu_addr,
                                              (void **)&hpd);
index f202b45..e86bddb 100644 (file)
@@ -1783,7 +1783,8 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
        mec_hpd_size = adev->gfx.num_compute_rings * GFX9_MEC_HPD_SIZE;
        if (mec_hpd_size) {
                r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
-                                             AMDGPU_GEM_DOMAIN_VRAM,
+                                             AMDGPU_GEM_DOMAIN_VRAM |
+                                             AMDGPU_GEM_DOMAIN_GTT,
                                              &adev->gfx.mec.hpd_eop_obj,
                                              &adev->gfx.mec.hpd_eop_gpu_addr,
                                              (void **)&hpd);
index 970b066..2c0964a 100644 (file)
@@ -549,7 +549,9 @@ static int mes_v11_0_allocate_ucode_buffer(struct amdgpu_device *adev,
        fw_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes);
 
        r = amdgpu_bo_create_reserved(adev, fw_size,
-                                     PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
+                                     PAGE_SIZE,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->mes.ucode_fw_obj[pipe],
                                      &adev->mes.ucode_fw_gpu_addr[pipe],
                                      (void **)&adev->mes.ucode_fw_ptr[pipe]);
@@ -582,7 +584,9 @@ static int mes_v11_0_allocate_ucode_data_buffer(struct amdgpu_device *adev,
        fw_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes);
 
        r = amdgpu_bo_create_reserved(adev, fw_size,
-                                     64 * 1024, AMDGPU_GEM_DOMAIN_VRAM,
+                                     64 * 1024,
+                                     AMDGPU_GEM_DOMAIN_VRAM |
+                                     AMDGPU_GEM_DOMAIN_GTT,
                                      &adev->mes.data_fw_obj[pipe],
                                      &adev->mes.data_fw_gpu_addr[pipe],
                                      (void **)&adev->mes.data_fw_ptr[pipe]);
index 844ccd1..e20aea3 100644 (file)
@@ -2085,7 +2085,9 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
         * TODO: Move this into GART.
         */
        r = amdgpu_bo_create_kernel(adev, region_info.fb_size, PAGE_SIZE,
-                                   AMDGPU_GEM_DOMAIN_VRAM, &adev->dm.dmub_bo,
+                                   AMDGPU_GEM_DOMAIN_VRAM |
+                                   AMDGPU_GEM_DOMAIN_GTT,
+                                   &adev->dm.dmub_bo,
                                    &adev->dm.dmub_bo_gpu_addr,
                                    &adev->dm.dmub_bo_cpu_addr);
        if (r)
index 88a5641..7eeab84 100644 (file)
@@ -250,9 +250,8 @@ static int smu10_smu_init(struct pp_hwmgr *hwmgr)
 
        /* allocate space for watermarks table */
        r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
-                       sizeof(Watermarks_t),
-                       PAGE_SIZE,
-                       AMDGPU_GEM_DOMAIN_VRAM,
+                       sizeof(Watermarks_t), PAGE_SIZE,
+                       AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT,
                        &priv->smu_tables.entry[SMU10_WMTABLE].handle,
                        &priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
                        &priv->smu_tables.entry[SMU10_WMTABLE].table);
@@ -266,9 +265,8 @@ static int smu10_smu_init(struct pp_hwmgr *hwmgr)
 
        /* allocate space for watermarks table */
        r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
-                       sizeof(DpmClocks_t),
-                       PAGE_SIZE,
-                       AMDGPU_GEM_DOMAIN_VRAM,
+                       sizeof(DpmClocks_t), PAGE_SIZE,
+                       AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT,
                        &priv->smu_tables.entry[SMU10_CLOCKTABLE].handle,
                        &priv->smu_tables.entry[SMU10_CLOCKTABLE].mc_addr,
                        &priv->smu_tables.entry[SMU10_CLOCKTABLE].table);