x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode

For the flavors having a GPR operand VEX.W is ignored outside of 64-bit
mode. The mnemonic should therefore not be KMOVQ.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d1170e6..967f6bc 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
 2018-11-06  Jan Beulich  <jbeulich@suse.com>
 
+       * testsuite/gas/i386/avx-wig.s: Add kmovd cases.
+       * testsuite/gas/i386/avx-wig.d: Adjust expectations.
+
+2018-11-06  Jan Beulich  <jbeulich@suse.com>
+
        * testsuite/gas/i386/avx-wig.s,
        testsuite/gas/i386/x86-64-avx-wig.s: Add vpextrb, vpextrw,
        vpinsrb, and vpinsrw cases.

diff --git a/gas/testsuite/gas/i386/avx-wig.d b/gas/testsuite/gas/i386/avx-wig.d
index c724d09..7a8f947 100644 (file)
--- a/gas/testsuite/gas/i386/avx-wig.d
+++ b/gas/testsuite/gas/i386/avx-wig.d
@@ -22,6 +22,8 @@ Disassembly of section .text:
  +[a-f0-9]+:   c4 e2 f8 f3 10          blsmsk \(%eax\),%eax
  +[a-f0-9]+:   c4 e2 f8 f3 08          blsr   \(%eax\),%eax
  +[a-f0-9]+:   c4 e2 f8 f5 00          bzhi   %eax,\(%eax\),%eax
+ +[a-f0-9]+:   c4 e1 fb 92 c0          kmovd  %eax,%k0
+ +[a-f0-9]+:   c4 e1 fb 93 c0          kmovd  %k0,%eax
  +[a-f0-9]+:   8f e9 f8 12 c0          llwpcb %eax
  +[a-f0-9]+:   8f ea f8 12 00 00 00 00 00      lwpins \$0x0,\(%eax\),%eax
  +[a-f0-9]+:   8f ea f8 12 08 00 00 00 00      lwpval \$0x0,\(%eax\),%eax

diff --git a/gas/testsuite/gas/i386/avx-wig.s b/gas/testsuite/gas/i386/avx-wig.s
index 3f16ede..4d17ab4 100644 (file)
--- a/gas/testsuite/gas/i386/avx-wig.s
+++ b/gas/testsuite/gas/i386/avx-wig.s
@@ -17,6 +17,8 @@ _start:
        blsmsk (%eax), %eax
        blsr (%eax), %eax
        bzhi %eax, (%eax), %eax
+       kmovd %eax, %k0
+       kmovd %k0, %eax
        llwpcb %eax
        lwpins $0, (%eax), %eax
        lwpval $0, (%eax), %eax

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9f82b3f..2212d8e 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,14 @@
 2018-11-06  Jan Beulich  <jbeulich@suse.com>
 
+       * i386-dis.c (MOD_VEX_W_0_0F92_P_3_LEN_0,
+       MOD_VEX_W_1_0F92_P_3_LEN_0): Fold into MOD_VEX_0F92_P_3_LEN_0.
+       (MOD_VEX_W_0_0F93_P_3_LEN_0, MOD_VEX_W_1_0F93_P_3_LEN_0): Fold
+       into MOD_VEX_0F93_P_3_LEN_0.
+       (vex_len_table, vex_w_table, mod_table): Move kmov[dq} with GPR
+       operand cases up one level in the hierarchy.
+
+2018-11-06  Jan Beulich  <jbeulich@suse.com>
+
        * i386-dis.c (VEX_W_0FC4_P_2, VEX_W_0FC5_P_2, VEX_W_0F3A14_P_2,
        VEX_W_0F3A15_P_2, VEX_W_0F3A20_P_2, EVEX_W_0F3A16_P_2,
        EVEX_W_0F3A22_P_2): Delete.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 82c5785..f3fbf19 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -903,12 +903,10 @@ enum
   MOD_VEX_W_1_0F91_P_2_LEN_0,
   MOD_VEX_W_0_0F92_P_0_LEN_0,
   MOD_VEX_W_0_0F92_P_2_LEN_0,
-  MOD_VEX_W_0_0F92_P_3_LEN_0,
-  MOD_VEX_W_1_0F92_P_3_LEN_0,
+  MOD_VEX_0F92_P_3_LEN_0,
   MOD_VEX_W_0_0F93_P_0_LEN_0,
   MOD_VEX_W_0_0F93_P_2_LEN_0,
-  MOD_VEX_W_0_0F93_P_3_LEN_0,
-  MOD_VEX_W_1_0F93_P_3_LEN_0,
+  MOD_VEX_0F93_P_3_LEN_0,
   MOD_VEX_W_0_0F98_P_0_LEN_0,
   MOD_VEX_W_1_0F98_P_0_LEN_0,
   MOD_VEX_W_0_0F98_P_2_LEN_0,
@@ -1963,10 +1961,8 @@ enum
   VEX_W_0F91_P_2_LEN_0,
   VEX_W_0F92_P_0_LEN_0,
   VEX_W_0F92_P_2_LEN_0,
-  VEX_W_0F92_P_3_LEN_0,
   VEX_W_0F93_P_0_LEN_0,
   VEX_W_0F93_P_2_LEN_0,
-  VEX_W_0F93_P_3_LEN_0,
   VEX_W_0F98_P_0_LEN_0,
   VEX_W_0F98_P_2_LEN_0,
   VEX_W_0F99_P_0_LEN_0,
@@ -9486,7 +9482,7 @@ static const struct dis386 vex_len_table[][2] = {
 
   /* VEX_LEN_0F92_P_3 */
   {
-    { VEX_W_TABLE (VEX_W_0F92_P_3_LEN_0) },
+    { MOD_TABLE (MOD_VEX_0F92_P_3_LEN_0) },
   },
 
   /* VEX_LEN_0F93_P_0 */
@@ -9501,7 +9497,7 @@ static const struct dis386 vex_len_table[][2] = {
 
   /* VEX_LEN_0F93_P_3 */
   {
-    { VEX_W_TABLE (VEX_W_0F93_P_3_LEN_0) },
+    { MOD_TABLE (MOD_VEX_0F93_P_3_LEN_0) },
   },
 
   /* VEX_LEN_0F98_P_0 */
@@ -10000,11 +9996,6 @@ static const struct dis386 vex_w_table[][2] = {
     { MOD_TABLE (MOD_VEX_W_0_0F92_P_2_LEN_0) },
   },
   {
-    /* VEX_W_0F92_P_3_LEN_0 */
-    { MOD_TABLE (MOD_VEX_W_0_0F92_P_3_LEN_0) },
-    { MOD_TABLE (MOD_VEX_W_1_0F92_P_3_LEN_0) },
-  },
-  {
     /* VEX_W_0F93_P_0_LEN_0 */
     { MOD_TABLE (MOD_VEX_W_0_0F93_P_0_LEN_0) },
   },
@@ -10013,11 +10004,6 @@ static const struct dis386 vex_w_table[][2] = {
     { MOD_TABLE (MOD_VEX_W_0_0F93_P_2_LEN_0) },
   },
   {
-    /* VEX_W_0F93_P_3_LEN_0 */
-    { MOD_TABLE (MOD_VEX_W_0_0F93_P_3_LEN_0) },
-    { MOD_TABLE (MOD_VEX_W_1_0F93_P_3_LEN_0) },
-  },
-  {
     /* VEX_W_0F98_P_0_LEN_0 */
     { MOD_TABLE (MOD_VEX_W_0_0F98_P_0_LEN_0) },
     { MOD_TABLE (MOD_VEX_W_1_0F98_P_0_LEN_0) },
@@ -10818,14 +10804,9 @@ static const struct dis386 mod_table[][2] = {
     { "kmovb",         { MaskG, Rdq }, 0 },
   },
   {
-    /* MOD_VEX_W_0_0F92_P_3_LEN_0 */
-    { Bad_Opcode },
-    { "kmovd",         { MaskG, Rdq }, 0 },
-  },
-  {
-    /* MOD_VEX_W_1_0F92_P_3_LEN_0 */
+    /* MOD_VEX_0F92_P_3_LEN_0 */
     { Bad_Opcode },
-    { "kmovq",         { MaskG, Rdq }, 0 },
+    { "kmovK",         { MaskG, Rdq }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F93_P_0_LEN_0 */
@@ -10838,14 +10819,9 @@ static const struct dis386 mod_table[][2] = {
     { "kmovb",         { Gdq, MaskR }, 0 },
   },
   {
-    /* MOD_VEX_W_0_0F93_P_3_LEN_0 */
-    { Bad_Opcode },
-    { "kmovd",         { Gdq, MaskR }, 0 },
-  },
-  {
-    /* MOD_VEX_W_1_0F93_P_3_LEN_0 */
+    /* MOD_VEX_0F93_P_3_LEN_0 */
     { Bad_Opcode },
-    { "kmovq",         { Gdq, MaskR }, 0 },
+    { "kmovK",         { Gdq, MaskR }, 0 },
   },
   {
     /* MOD_VEX_W_0_0F98_P_0_LEN_0 */