ASoC: cs42l42: Add Capture Support
authorLucas Tanure <tanureal@opensource.cirrus.com>
Sat, 6 Mar 2021 18:55:48 +0000 (18:55 +0000)
committerMark Brown <broonie@kernel.org>
Wed, 10 Mar 2021 13:14:26 +0000 (13:14 +0000)
Add support for capture path on headseat pins

Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210306185553.62053-11-tanureal@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/cs42l42.c
sound/soc/codecs/cs42l42.h

index 2dca55d..b508468 100644 (file)
@@ -472,6 +472,18 @@ static const struct snd_soc_dapm_widget cs42l42_dapm_widgets[] = {
 
        /* Playback Requirements */
        SND_SOC_DAPM_SUPPLY("ASP DAI0", CS42L42_PWR_CTL1, CS42L42_ASP_DAI_PDN_SHIFT, 1, NULL, 0),
+
+       /* Capture Path */
+       SND_SOC_DAPM_INPUT("HS"),
+       SND_SOC_DAPM_ADC("ADC", NULL, CS42L42_PWR_CTL1, CS42L42_ADC_PDN_SHIFT, 1),
+       SND_SOC_DAPM_AIF_OUT("SDOUT1", NULL, 0, CS42L42_ASP_TX_CH_EN, CS42L42_ASP_TX0_CH1_SHIFT, 0),
+       SND_SOC_DAPM_AIF_OUT("SDOUT2", NULL, 1, CS42L42_ASP_TX_CH_EN, CS42L42_ASP_TX0_CH2_SHIFT, 0),
+
+       /* Capture Requirements */
+       SND_SOC_DAPM_SUPPLY("ASP DAO0", CS42L42_PWR_CTL1, CS42L42_ASP_DAO_PDN_SHIFT, 1, NULL, 0),
+       SND_SOC_DAPM_SUPPLY("ASP TX EN", CS42L42_ASP_TX_SZ_EN, CS42L42_ASP_TX_EN_SHIFT, 0, NULL, 0),
+
+       /* Playback/Capture Requirements */
        SND_SOC_DAPM_SUPPLY("SCLK", CS42L42_ASP_CLK_CFG, CS42L42_ASP_SCLK_EN_SHIFT, 0, NULL, 0),
 };
 
@@ -489,6 +501,21 @@ static const struct snd_soc_dapm_route cs42l42_audio_map[] = {
        {"SDIN2", NULL, "ASP DAI0"},
        {"SDIN1", NULL, "SCLK"},
        {"SDIN2", NULL, "SCLK"},
+
+       /* Capture Path */
+       {"ADC", NULL, "HS"},
+       { "SDOUT1", NULL, "ADC" },
+       { "SDOUT2", NULL, "ADC" },
+       { "Capture", NULL, "SDOUT1" },
+       { "Capture", NULL, "SDOUT2" },
+
+       /* Capture Requirements */
+       { "SDOUT1", NULL, "ASP DAO0" },
+       { "SDOUT2", NULL, "ASP DAO0" },
+       { "SDOUT1", NULL, "SCLK" },
+       { "SDOUT2", NULL, "SCLK" },
+       { "SDOUT1", NULL, "ASP TX EN" },
+       { "SDOUT2", NULL, "ASP TX EN" },
 };
 
 static int cs42l42_component_probe(struct snd_soc_component *component)
@@ -748,12 +775,24 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
 {
        struct snd_soc_component *component = dai->component;
        struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
+       unsigned int channels = params_channels(params);
        unsigned int width = (params_width(params) / 8) - 1;
        unsigned int val = 0;
 
        cs42l42->srate = params_rate(params);
 
        switch(substream->stream) {
+       case SNDRV_PCM_STREAM_CAPTURE:
+               if (channels == 2) {
+                       val |= CS42L42_ASP_TX_CH2_AP_MASK;
+                       val |= width << CS42L42_ASP_TX_CH2_RES_SHIFT;
+               }
+               val |= width << CS42L42_ASP_TX_CH1_RES_SHIFT;
+
+               snd_soc_component_update_bits(component, CS42L42_ASP_TX_CH_AP_RES,
+                               CS42L42_ASP_TX_CH1_AP_MASK | CS42L42_ASP_TX_CH2_AP_MASK |
+                               CS42L42_ASP_TX_CH2_RES_MASK | CS42L42_ASP_TX_CH1_RES_MASK, val);
+               break;
        case SNDRV_PCM_STREAM_PLAYBACK:
                val |= width << CS42L42_ASP_RX_CH_RES_SHIFT;
                /* channel 1 on low LRCLK */
index 3dcbfeb..c373259 100644 (file)
 
 /* Page 0x29 Serial Port TX Registers */
 #define CS42L42_ASP_TX_SZ_EN           (CS42L42_PAGE_29 + 0x01)
+#define CS42L42_ASP_TX_EN_SHIFT                0
 #define CS42L42_ASP_TX_CH_EN           (CS42L42_PAGE_29 + 0x02)
+#define CS42L42_ASP_TX0_CH2_SHIFT      1
+#define CS42L42_ASP_TX0_CH1_SHIFT      0
+
 #define CS42L42_ASP_TX_CH_AP_RES       (CS42L42_PAGE_29 + 0x03)
+#define CS42L42_ASP_TX_CH1_AP_SHIFT    7
+#define CS42L42_ASP_TX_CH1_AP_MASK     (1 << CS42L42_ASP_TX_CH1_AP_SHIFT)
+#define CS42L42_ASP_TX_CH2_AP_SHIFT    6
+#define CS42L42_ASP_TX_CH2_AP_MASK     (1 << CS42L42_ASP_TX_CH2_AP_SHIFT)
+#define CS42L42_ASP_TX_CH2_RES_SHIFT   2
+#define CS42L42_ASP_TX_CH2_RES_MASK    (3 << CS42L42_ASP_TX_CH2_RES_SHIFT)
+#define CS42L42_ASP_TX_CH1_RES_SHIFT   0
+#define CS42L42_ASP_TX_CH1_RES_MASK    (3 << CS42L42_ASP_TX_CH1_RES_SHIFT)
 #define CS42L42_ASP_TX_CH1_BIT_MSB     (CS42L42_PAGE_29 + 0x04)
 #define CS42L42_ASP_TX_CH1_BIT_LSB     (CS42L42_PAGE_29 + 0x05)
 #define CS42L42_ASP_TX_HIZ_DLY_CFG     (CS42L42_PAGE_29 + 0x06)