drm/amd/display: don't call dm_pp_ function from an fpu block
authorHarry Wentland <harry.wentland@amd.com>
Wed, 30 Jan 2019 20:45:18 +0000 (15:45 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 23 Mar 2019 19:10:12 +0000 (20:10 +0100)
commit 59d3191f14dc18881fec1172c7096b7863622803 upstream.

Powerplay functions called from dm_pp_* functions tend to do a
mutex_lock which isn't safe to do inside a kernel_fpu_begin/end block as
those will disable/enable preemption.

Rearrange the dm_pp_get_clock_levels_by_type_with_voltage calls to make
sure they happen outside of kernel_fpu_begin/end.

Cc: stable@vger.kernel.org
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c

index bd039322f697b4727a8ef985416d3f5d0355de7b..6342f649935123c7e442bd839ab6a6f93d694b6c 100644 (file)
@@ -1347,12 +1347,12 @@ void dcn_bw_update_from_pplib(struct dc *dc)
        struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
        bool res;
 
-       kernel_fpu_begin();
-
        /* TODO: This is not the proper way to obtain fabric_and_dram_bandwidth, should be min(fclk, memclk) */
        res = dm_pp_get_clock_levels_by_type_with_voltage(
                        ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks);
 
+       kernel_fpu_begin();
+
        if (res)
                res = verify_clock_values(&fclks);
 
@@ -1371,9 +1371,13 @@ void dcn_bw_update_from_pplib(struct dc *dc)
        } else
                BREAK_TO_DEBUGGER();
 
+       kernel_fpu_end();
+
        res = dm_pp_get_clock_levels_by_type_with_voltage(
                        ctx, DM_PP_CLOCK_TYPE_DCFCLK, &dcfclks);
 
+       kernel_fpu_begin();
+
        if (res)
                res = verify_clock_values(&dcfclks);