if (CPU.empty() || CPU == "generic")
CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32";
- MCSubtargetInfo *STI =
- createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
-
- // Check if Feature string is valid
- auto ISAInfo =
- RISCVFeatures::parseFeatureBits(TT.isArch64Bit(), STI->getFeatureBits());
- if (!ISAInfo)
- report_fatal_error(ISAInfo.takeError());
- else
- return STI;
+ return createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
}
static MCInstPrinter *createRISCVMCInstPrinter(const Triple &T,
; RUN: not --crash llc -mtriple=riscv64 -mattr=+e < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV64E %s
-; RV64E: LLVM ERROR: standard user-level extension 'e' requires 'rv32'
+; RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target
# RUN: not --crash llvm-mc -triple riscv64 -mattr=+e < %s 2>&1 \
# RUN: | FileCheck %s -check-prefix=RV64E
-# RV64E: LLVM ERROR: standard user-level extension 'e' requires 'rv32'
+# RV64E: LLVM ERROR: RV32E can't be enabled for an RV64 target