drm/amdgpu/gmc10: add sienna_cichlid support
authorLikun Gao <Likun.Gao@amd.com>
Tue, 19 Mar 2019 02:52:52 +0000 (10:52 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 3 Jun 2020 17:51:58 +0000 (13:51 -0400)
Same as navi10.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

index ba2b7ac..fb8030c 100644 (file)
@@ -712,6 +712,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
                case CHIP_NAVI10:
                case CHIP_NAVI14:
                case CHIP_NAVI12:
+               case CHIP_SIENNA_CICHLID:
                default:
                        adev->gmc.gart_size = 512ULL << 20;
                        break;
@@ -798,6 +799,7 @@ static int gmc_v10_0_sw_init(void *handle)
        case CHIP_NAVI10:
        case CHIP_NAVI14:
        case CHIP_NAVI12:
+       case CHIP_SIENNA_CICHLID:
                adev->num_vmhubs = 2;
                /*
                 * To fulfill 4-level page support,
@@ -896,6 +898,7 @@ static void gmc_v10_0_init_golden_registers(struct amdgpu_device *adev)
        case CHIP_NAVI10:
        case CHIP_NAVI14:
        case CHIP_NAVI12:
+       case CHIP_SIENNA_CICHLID:
                break;
        default:
                break;