Control reg write should be part of setbrg for better
buadrate generation, so move cr1 and cr2 write to
mxc_serial_setbrg
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
writel(0xf, &mxc_base->bir);
writel(clk / (2 * gd->baudrate), &mxc_base->bmr);
+ writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST,
+ &mxc_base->cr2);
+ writel(UCR1_UARTEN, &mxc_base->cr1);
}
static int mxc_serial_getc(void)
serial_setbrg();
- writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST,
- &mxc_base->cr2);
-
- writel(UCR1_UARTEN, &mxc_base->cr1);
-
return 0;
}