/// this register changes. For example, the invalidate list for eax would be
/// rax ax, ah, and al.
uint32_t *invalidate_regs;
+ // Will be replaced with register flags info in the next patch.
+ void *unused;
llvm::ArrayRef<uint8_t> data(const uint8_t *context_base) const {
return llvm::ArrayRef<uint8_t>(context_base + byte_offset, byte_size);
DEFINE_REG_NAME(dwarf_num), DEFINE_REG_NAME_STR(str_name), \
0, 0, eEncodingInvalid, eFormatDefault, \
{ dwarf_num, dwarf_num, generic_num, LLDB_INVALID_REGNUM, dwarf_num }, \
- nullptr, nullptr \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_REGISTER_STUB(dwarf_num, str_name) \
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r1",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r2",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r3",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"sp",
"r13",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"lr",
"r14",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
"r15",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"cpsr",
"psr",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s0",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s1",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s2",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s3",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s8",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s9",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s10",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s11",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s13",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s14",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s15",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s16",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s17",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s18",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s19",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s20",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s21",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s22",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s23",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s24",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s25",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s26",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s27",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s28",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s29",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s30",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s31",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"fpscr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d0",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d1",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d2",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d3",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d8",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d9",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d10",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d11",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d13",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d14",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d15",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d16",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d17",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d18",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d19",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d20",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d21",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d22",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d23",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d24",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d25",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d26",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d27",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d28",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d29",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d30",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d31",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_usr",
"sp_usr",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_usr",
"lr_usr",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_fiq",
"sp_fiq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_fiq",
"lr_fiq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_irq",
"sp_irq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_irq",
"lr_irq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_abt",
"sp_abt",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_abt",
"lr_abt",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_und",
"sp_und",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_und",
"lr_und",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_svc",
"sp_svc",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_svc",
"lr_svc",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
}};
static const uint32_t k_num_register_infos = std::size(g_register_infos);
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r1",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r2",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r3",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"sp",
"r13",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"lr",
"r14",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
"r15",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"cpsr",
"psr",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s0",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s1",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s2",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s3",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s8",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s9",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s10",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s11",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s13",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s14",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s15",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s16",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s17",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s18",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s19",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s20",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s21",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s22",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s23",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s24",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s25",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s26",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s27",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s28",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s29",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s30",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"s31",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"fpscr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d0",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d1",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d2",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d3",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d8",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d9",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d10",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d11",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d13",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d14",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d15",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d16",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d17",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d18",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d19",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d20",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d21",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d22",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d23",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d24",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d25",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d26",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d27",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d28",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d29",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d30",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"d31",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12_usr",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_usr",
"sp_usr",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_usr",
"lr_usr",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12_fiq",
nullptr,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_fiq",
"sp_fiq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_fiq",
"lr_fiq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_irq",
"sp_irq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_irq",
"lr_irq",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_abt",
"sp_abt",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_abt",
"lr_abt",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13_und",
"sp_und",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_und",
"lr_und",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
+
},
{"r13_svc",
"sp_svc",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14_svc",
"lr_svc",
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
}};
static const uint32_t k_num_register_infos = std::size(g_register_infos);
{0, 0, LLDB_INVALID_REGNUM, 0, 0},
nullptr,
nullptr,
+ nullptr,
},
{"r01",
"",
{1, 1, LLDB_INVALID_REGNUM, 1, 1},
nullptr,
nullptr,
+ nullptr,
},
{"r02",
"",
{2, 2, LLDB_INVALID_REGNUM, 2, 2},
nullptr,
nullptr,
+ nullptr,
},
{"r03",
"",
{3, 3, LLDB_INVALID_REGNUM, 3, 3},
nullptr,
nullptr,
+ nullptr,
},
{"r04",
"",
{4, 4, LLDB_INVALID_REGNUM, 4, 4},
nullptr,
nullptr,
+ nullptr,
},
{"r05",
"",
{5, 5, LLDB_INVALID_REGNUM, 5, 5},
nullptr,
nullptr,
+ nullptr,
},
{"r06",
"",
{6, 6, LLDB_INVALID_REGNUM, 6, 6},
nullptr,
nullptr,
+ nullptr,
},
{"r07",
"",
{7, 7, LLDB_INVALID_REGNUM, 7, 7},
nullptr,
nullptr,
+ nullptr,
},
{"r08",
"",
{8, 8, LLDB_INVALID_REGNUM, 8, 8},
nullptr,
nullptr,
+ nullptr,
},
{"r09",
"",
{9, 9, LLDB_INVALID_REGNUM, 9, 9},
nullptr,
nullptr,
+ nullptr,
},
{"r10",
"",
{10, 10, LLDB_INVALID_REGNUM, 10, 10},
nullptr,
nullptr,
+ nullptr,
},
{"r11",
"",
{11, 11, LLDB_INVALID_REGNUM, 11, 11},
nullptr,
nullptr,
+ nullptr,
},
{"r12",
"",
{12, 12, LLDB_INVALID_REGNUM, 12, 12},
nullptr,
nullptr,
+ nullptr,
},
{"r13",
"",
{13, 13, LLDB_INVALID_REGNUM, 13, 13},
nullptr,
nullptr,
+ nullptr,
},
{"r14",
"",
{14, 14, LLDB_INVALID_REGNUM, 14, 14},
nullptr,
nullptr,
+ nullptr,
},
{"r15",
"",
{15, 15, LLDB_INVALID_REGNUM, 15, 15},
nullptr,
nullptr,
+ nullptr,
},
{"r16",
"",
{16, 16, LLDB_INVALID_REGNUM, 16, 16},
nullptr,
nullptr,
+ nullptr,
},
{"r17",
"",
{17, 17, LLDB_INVALID_REGNUM, 17, 17},
nullptr,
nullptr,
+ nullptr,
},
{"r18",
"",
{18, 18, LLDB_INVALID_REGNUM, 18, 18},
nullptr,
nullptr,
+ nullptr,
},
{"r19",
"",
{19, 19, LLDB_INVALID_REGNUM, 19, 19},
nullptr,
nullptr,
+ nullptr,
},
{"r20",
"",
{20, 20, LLDB_INVALID_REGNUM, 20, 20},
nullptr,
nullptr,
+ nullptr,
},
{"r21",
"",
{21, 21, LLDB_INVALID_REGNUM, 21, 21},
nullptr,
nullptr,
+ nullptr,
},
{"r22",
"",
{22, 22, LLDB_INVALID_REGNUM, 22, 22},
nullptr,
nullptr,
+ nullptr,
},
{"r23",
"",
{23, 23, LLDB_INVALID_REGNUM, 23, 23},
nullptr,
nullptr,
+ nullptr,
},
{"r24",
"",
{24, 24, LLDB_INVALID_REGNUM, 24, 24},
nullptr,
nullptr,
+ nullptr,
},
{"r25",
"",
{25, 25, LLDB_INVALID_REGNUM, 25, 25},
nullptr,
nullptr,
+ nullptr,
},
{"r26",
"",
{26, 26, LLDB_INVALID_REGNUM, 26, 26},
nullptr,
nullptr,
+ nullptr,
},
{"r27",
"",
{27, 27, LLDB_INVALID_REGNUM, 27, 27},
nullptr,
nullptr,
+ nullptr,
},
{"r28",
"",
{28, 28, LLDB_INVALID_REGNUM, 28, 28},
nullptr,
nullptr,
+ nullptr,
},
{"sp",
"r29",
{29, 29, LLDB_REGNUM_GENERIC_SP, 29, 29},
nullptr,
nullptr,
+ nullptr,
},
{"fp",
"r30",
{30, 30, LLDB_REGNUM_GENERIC_FP, 30, 30},
nullptr,
nullptr,
+ nullptr,
},
{"lr",
"r31",
{31, 31, LLDB_REGNUM_GENERIC_RA, 31, 31},
nullptr,
nullptr,
+ nullptr,
},
{"sa0",
"",
{32, 32, LLDB_INVALID_REGNUM, 32, 32},
nullptr,
nullptr,
+ nullptr,
},
{"lc0",
"",
{33, 33, LLDB_INVALID_REGNUM, 33, 33},
nullptr,
nullptr,
+ nullptr,
},
{"sa1",
"",
{34, 34, LLDB_INVALID_REGNUM, 34, 34},
nullptr,
nullptr,
+ nullptr,
},
{"lc1",
"",
{35, 35, LLDB_INVALID_REGNUM, 35, 35},
nullptr,
nullptr,
+ nullptr,
},
// --> hexagon-v4/5/55/56-sim.xml
{"p3_0",
{36, 36, LLDB_INVALID_REGNUM, 36, 36},
nullptr,
nullptr,
+ nullptr,
+
},
// PADDING {
{"p00",
{37, 37, LLDB_INVALID_REGNUM, 37, 37},
nullptr,
nullptr,
+ nullptr,
},
// }
{"m0",
{38, 38, LLDB_INVALID_REGNUM, 38, 38},
nullptr,
nullptr,
+ nullptr,
},
{"m1",
"",
{39, 39, LLDB_INVALID_REGNUM, 39, 39},
nullptr,
nullptr,
+ nullptr,
},
{"usr",
"",
{40, 40, LLDB_INVALID_REGNUM, 40, 40},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
"",
{41, 41, LLDB_REGNUM_GENERIC_PC, 41, 41},
nullptr,
nullptr,
+ nullptr,
},
{"ugp",
"",
{42, 42, LLDB_INVALID_REGNUM, 42, 42},
nullptr,
nullptr,
+ nullptr,
},
{"gp",
"",
{43, 43, LLDB_INVALID_REGNUM, 43, 43},
nullptr,
nullptr,
+ nullptr,
},
{"cs0",
"",
{44, 44, LLDB_INVALID_REGNUM, 44, 44},
nullptr,
nullptr,
+ nullptr,
},
{"cs1",
"",
{45, 45, LLDB_INVALID_REGNUM, 45, 45},
nullptr,
nullptr,
+ nullptr,
},
// PADDING {
{"p01",
{46, 46, LLDB_INVALID_REGNUM, 46, 46},
nullptr,
nullptr,
+ nullptr,
},
{"p02",
"",
{47, 47, LLDB_INVALID_REGNUM, 47, 47},
nullptr,
nullptr,
+ nullptr,
},
{"p03",
"",
{48, 48, LLDB_INVALID_REGNUM, 48, 48},
nullptr,
nullptr,
+ nullptr,
},
{"p04",
"",
{49, 49, LLDB_INVALID_REGNUM, 49, 49},
nullptr,
nullptr,
+ nullptr,
},
{"p05",
"",
{50, 50, LLDB_INVALID_REGNUM, 50, 50},
nullptr,
nullptr,
+ nullptr,
},
{"p06",
"",
{51, 51, LLDB_INVALID_REGNUM, 51, 51},
nullptr,
nullptr,
+ nullptr,
},
{"p07",
"",
{52, 52, LLDB_INVALID_REGNUM, 52, 52},
nullptr,
nullptr,
+ nullptr,
},
{"p08",
"",
{53, 53, LLDB_INVALID_REGNUM, 53, 53},
nullptr,
nullptr,
+ nullptr,
},
{"p09",
"",
{54, 54, LLDB_INVALID_REGNUM, 54, 54},
nullptr,
nullptr,
+ nullptr,
},
{"p10",
"",
{55, 55, LLDB_INVALID_REGNUM, 55, 55},
nullptr,
nullptr,
+ nullptr,
},
{"p11",
"",
{56, 56, LLDB_INVALID_REGNUM, 56, 56},
nullptr,
nullptr,
+ nullptr,
},
{"p12",
"",
{57, 57, LLDB_INVALID_REGNUM, 57, 57},
nullptr,
nullptr,
+ nullptr,
},
{"p13",
"",
{58, 58, LLDB_INVALID_REGNUM, 58, 58},
nullptr,
nullptr,
+ nullptr,
},
{"p14",
"",
{59, 59, LLDB_INVALID_REGNUM, 59, 59},
nullptr,
nullptr,
+ nullptr,
},
{"p15",
"",
{60, 60, LLDB_INVALID_REGNUM, 60, 60},
nullptr,
nullptr,
+ nullptr,
},
{"p16",
"",
{61, 61, LLDB_INVALID_REGNUM, 61, 61},
nullptr,
nullptr,
+ nullptr,
},
{"p17",
"",
{62, 62, LLDB_INVALID_REGNUM, 62, 62},
nullptr,
nullptr,
+ nullptr,
},
{"p18",
"",
{63, 63, LLDB_INVALID_REGNUM, 63, 63},
nullptr,
nullptr,
+ nullptr,
},
// }
{"sgp0",
{64, 64, LLDB_INVALID_REGNUM, 64, 64},
nullptr,
nullptr,
+ nullptr,
},
// PADDING {
{"p19",
{65, 65, LLDB_INVALID_REGNUM, 65, 65},
nullptr,
nullptr,
+ nullptr,
},
// }
{"stid",
{66, 66, LLDB_INVALID_REGNUM, 66, 66},
nullptr,
nullptr,
+ nullptr,
},
{"elr",
"",
{67, 67, LLDB_INVALID_REGNUM, 67, 67},
nullptr,
nullptr,
+ nullptr,
},
{"badva0",
"",
{68, 68, LLDB_INVALID_REGNUM, 68, 68},
nullptr,
nullptr,
+ nullptr,
},
{"badva1",
"",
{69, 69, LLDB_INVALID_REGNUM, 69, 69},
nullptr,
nullptr,
+ nullptr,
},
{"ssr",
"",
{70, 70, LLDB_INVALID_REGNUM, 70, 70},
nullptr,
nullptr,
+ nullptr,
},
{"ccr",
"",
{71, 71, LLDB_INVALID_REGNUM, 71, 71},
nullptr,
nullptr,
+ nullptr,
},
{"htid",
"",
{72, 72, LLDB_INVALID_REGNUM, 72, 72},
nullptr,
nullptr,
+ nullptr,
},
// PADDING {
{"p20",
{73, 73, LLDB_INVALID_REGNUM, 73, 73},
nullptr,
nullptr,
+ nullptr,
},
// }
{"imask",
{74, 74, LLDB_INVALID_REGNUM, 74, 74},
nullptr,
nullptr,
+ nullptr,
},
// PADDING {
{"p21",
{75, 75, LLDB_INVALID_REGNUM, 75, 75},
nullptr,
nullptr,
+ nullptr,
},
{"p22",
"",
{76, 76, LLDB_INVALID_REGNUM, 76, 76},
nullptr,
nullptr,
+ nullptr,
},
{"p23",
"",
{77, 77, LLDB_INVALID_REGNUM, 77, 77},
nullptr,
nullptr,
+ nullptr,
},
{"p24",
"",
{78, 78, LLDB_INVALID_REGNUM, 78, 78},
nullptr,
nullptr,
+ nullptr,
},
{"p25",
"",
{79, 79, LLDB_INVALID_REGNUM, 79, 79},
nullptr,
nullptr,
+ nullptr,
},
// }
{"g0",
{80, 80, LLDB_INVALID_REGNUM, 80, 80},
nullptr,
nullptr,
+ nullptr,
},
{"g1",
"",
{81, 81, LLDB_INVALID_REGNUM, 81, 81},
nullptr,
nullptr,
+ nullptr,
},
{"g2",
"",
{82, 82, LLDB_INVALID_REGNUM, 82, 82},
nullptr,
nullptr,
+ nullptr,
},
{"g3",
"",
{83, 83, LLDB_INVALID_REGNUM, 83, 83},
nullptr,
nullptr,
+ nullptr,
}};
static const uint32_t k_num_register_infos =
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r1",
"AT",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r2",
"v0",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r3",
"v1",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8",
"arg5",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9",
"arg6",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10",
"arg7",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11",
"arg8",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r15",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r16",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r17",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r18",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r19",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r20",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r21",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r22",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r23",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r24",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r25",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r26",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r27",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r28",
"gp",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r29",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r30",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r31",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"sr",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"lo",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"hi",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"bad",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"cause",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
};
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r1",
"AT",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
+
},
{"r2",
"v0",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r3",
"v1",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r4",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r5",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r6",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r7",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r8",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r9",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r10",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r11",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r12",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r13",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r14",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r15",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r16",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r17",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r18",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r19",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r20",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r21",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r22",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r23",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r24",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r25",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r26",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r27",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r28",
"gp",
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r29",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r30",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"r31",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"sr",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"lo",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"hi",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"bad",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"cause",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
nullptr,
LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
},
};
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ \
#reg, alt, 8, 0, eEncodingUint, eFormatHex, {kind1, kind2, kind3, kind4 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
static const RegisterInfo g_register_infos[] = {
{dwarf_cfa, dwarf_cfa, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
nullptr,
+ nullptr,
}};
static const uint32_t k_num_register_infos = std::size(g_register_infos);
#name, alt, size, 0, eEncodingUint, eFormatHex, \
{dwarf_##name##_s390x, dwarf_##name##_s390x, generic, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
static const RegisterInfo g_register_infos[] = {
"na", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM}, \
- nullptr, nullptr
+ nullptr, nullptr, nullptr
#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- nullptr, nullptr,
+ nullptr, nullptr, nullptr,
#define REG_CONTEXT_SIZE \
(sizeof(RegisterContextDarwin_arm::GPR) + \
sizeof(RegisterContextDarwin_arm::FPU) + \
{ehframe_r0, dwarf_r0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r0},
nullptr,
nullptr,
+ nullptr,
},
{"r1",
nullptr,
{ehframe_r1, dwarf_r1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r1},
nullptr,
nullptr,
+ nullptr,
},
{"r2",
nullptr,
{ehframe_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r2},
nullptr,
nullptr,
+ nullptr,
},
{"r3",
nullptr,
{ehframe_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r3},
nullptr,
nullptr,
+ nullptr,
},
{"r4",
nullptr,
{ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r4},
nullptr,
nullptr,
+ nullptr,
},
{"r5",
nullptr,
{ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r5},
nullptr,
nullptr,
+ nullptr,
},
{"r6",
nullptr,
{ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r6},
nullptr,
nullptr,
+ nullptr,
},
{"r7",
nullptr,
gpr_r7},
nullptr,
nullptr,
+ nullptr,
},
{"r8",
nullptr,
{ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r8},
nullptr,
nullptr,
+ nullptr,
},
{"r9",
nullptr,
{ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, gpr_r9},
nullptr,
nullptr,
+ nullptr,
},
{"r10",
nullptr,
gpr_r10},
nullptr,
nullptr,
+ nullptr,
},
{"r11",
nullptr,
gpr_r11},
nullptr,
nullptr,
+ nullptr,
},
{"r12",
nullptr,
gpr_r12},
nullptr,
nullptr,
+ nullptr,
},
{"sp",
"r13",
gpr_sp},
nullptr,
nullptr,
+ nullptr,
},
{"lr",
"r14",
gpr_lr},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
"r15",
gpr_pc},
nullptr,
nullptr,
+ nullptr,
},
{"cpsr",
"psr",
gpr_cpsr},
nullptr,
nullptr,
+ nullptr,
},
{"s0",
fpu_s0},
nullptr,
nullptr,
+ nullptr,
},
{"s1",
nullptr,
fpu_s1},
nullptr,
nullptr,
+ nullptr,
},
{"s2",
nullptr,
fpu_s2},
nullptr,
nullptr,
+ nullptr,
},
{"s3",
nullptr,
fpu_s3},
nullptr,
nullptr,
+ nullptr,
},
{"s4",
nullptr,
fpu_s4},
nullptr,
nullptr,
+ nullptr,
},
{"s5",
nullptr,
fpu_s5},
nullptr,
nullptr,
+ nullptr,
},
{"s6",
nullptr,
fpu_s6},
nullptr,
nullptr,
+ nullptr,
},
{"s7",
nullptr,
fpu_s7},
nullptr,
nullptr,
+ nullptr,
},
{"s8",
nullptr,
fpu_s8},
nullptr,
nullptr,
+ nullptr,
},
{"s9",
nullptr,
fpu_s9},
nullptr,
nullptr,
+ nullptr,
},
{"s10",
nullptr,
fpu_s10},
nullptr,
nullptr,
+ nullptr,
},
{"s11",
nullptr,
fpu_s11},
nullptr,
nullptr,
+ nullptr,
},
{"s12",
nullptr,
fpu_s12},
nullptr,
nullptr,
+ nullptr,
},
{"s13",
nullptr,
fpu_s13},
nullptr,
nullptr,
+ nullptr,
},
{"s14",
nullptr,
fpu_s14},
nullptr,
nullptr,
+ nullptr,
},
{"s15",
nullptr,
fpu_s15},
nullptr,
nullptr,
+ nullptr,
},
{"s16",
nullptr,
fpu_s16},
nullptr,
nullptr,
+ nullptr,
},
{"s17",
nullptr,
fpu_s17},
nullptr,
nullptr,
+ nullptr,
},
{"s18",
nullptr,
fpu_s18},
nullptr,
nullptr,
+ nullptr,
},
{"s19",
nullptr,
fpu_s19},
nullptr,
nullptr,
+ nullptr,
},
{"s20",
nullptr,
fpu_s20},
nullptr,
nullptr,
+ nullptr,
},
{"s21",
nullptr,
fpu_s21},
nullptr,
nullptr,
+ nullptr,
},
{"s22",
nullptr,
fpu_s22},
nullptr,
nullptr,
+ nullptr,
},
{"s23",
nullptr,
fpu_s23},
nullptr,
nullptr,
+ nullptr,
},
{"s24",
nullptr,
fpu_s24},
nullptr,
nullptr,
+ nullptr,
},
{"s25",
nullptr,
fpu_s25},
nullptr,
nullptr,
+ nullptr,
},
{"s26",
nullptr,
fpu_s26},
nullptr,
nullptr,
+ nullptr,
},
{"s27",
nullptr,
fpu_s27},
nullptr,
nullptr,
+ nullptr,
},
{"s28",
nullptr,
fpu_s28},
nullptr,
nullptr,
+ nullptr,
},
{"s29",
nullptr,
fpu_s29},
nullptr,
nullptr,
+ nullptr,
},
{"s30",
nullptr,
fpu_s30},
nullptr,
nullptr,
+ nullptr,
},
{"s31",
nullptr,
fpu_s31},
nullptr,
nullptr,
+ nullptr,
},
{"fpscr",
nullptr,
LLDB_INVALID_REGNUM, fpu_fpscr},
nullptr,
nullptr,
+ nullptr,
},
{"exception",
LLDB_INVALID_REGNUM, exc_exception},
nullptr,
nullptr,
+ nullptr,
},
{"fsr",
nullptr,
LLDB_INVALID_REGNUM, exc_fsr},
nullptr,
nullptr,
+ nullptr,
},
{"far",
nullptr,
LLDB_INVALID_REGNUM, exc_far},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_DBG(bvr, 0)},
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- NULL, NULL
+ NULL, NULL, NULL
#define REG_CONTEXT_SIZE \
(sizeof(RegisterContextDarwin_arm64::GPR) + \
sizeof(RegisterContextDarwin_arm64::FPU) + \
{LLDB_INVALID_REGNUM, dwarf_##reg##i, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
fpu_##reg##i }, \
- nullptr, nullptr,
+ nullptr, nullptr, nullptr,
#define DEFINE_EXC(reg) \
#reg, NULL, sizeof(((RegisterContextDarwin_i386::EXC *) NULL)->reg), \
gpr_eax},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ebx, nullptr),
{ehframe_ebx, dwarf_ebx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_ebx},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ecx, nullptr),
{ehframe_ecx, dwarf_ecx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_ecx},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(edx, nullptr),
{ehframe_edx, dwarf_edx, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_edx},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(edi, nullptr),
{ehframe_edi, dwarf_edi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_edi},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(esi, nullptr),
{ehframe_esi, dwarf_esi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
gpr_esi},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ebp, "fp"),
{ehframe_ebp, dwarf_ebp, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
gpr_ebp},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(esp, "sp"),
{ehframe_esp, dwarf_esp, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
gpr_esp},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ss, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_ss},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(eflags, "flags"),
{ehframe_eflags, dwarf_eflags, LLDB_REGNUM_GENERIC_FLAGS,
LLDB_INVALID_REGNUM, gpr_eflags},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(eip, "pc"),
{ehframe_eip, dwarf_eip, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
gpr_eip},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(cs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_cs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ds, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_ds},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(es, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_es},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(fs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_fs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(gs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_gs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(fcw),
LLDB_INVALID_REGNUM, fpu_fcw},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(fsw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fsw},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(ftw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ftw},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(fop),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fop},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(ip),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ip},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(cs),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_cs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(dp),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_dp},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(ds),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ds},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(mxcsr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsr},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(mxcsrmask),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsrmask},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_VECT(stmm, 0)},
{DEFINE_FPU_VECT(stmm, 1)},
LLDB_INVALID_REGNUM, exc_trapno},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_EXC(err),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_err},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_EXC(faultvaddr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_faultvaddr},
nullptr,
nullptr,
+ nullptr,
}};
static size_t k_num_register_infos = std::size(g_register_infos);
{ehframe_dwarf_fpu_##reg##i, \
ehframe_dwarf_fpu_##reg##i, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, fpu_##reg##i }, \
- nullptr, nullptr,
+ nullptr, nullptr, nullptr,
#define DEFINE_EXC(reg) \
#reg, NULL, sizeof(((RegisterContextDarwin_x86_64::EXC *) NULL)->reg), \
EXC_OFFSET(reg), eEncodingUint, eFormatHex
LLDB_INVALID_REGNUM, gpr_rax},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rbx, nullptr),
{ehframe_dwarf_gpr_rbx, ehframe_dwarf_gpr_rbx, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rbx},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rcx, nullptr),
{ehframe_dwarf_gpr_rcx, ehframe_dwarf_gpr_rcx, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rcx},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rdx, nullptr),
{ehframe_dwarf_gpr_rdx, ehframe_dwarf_gpr_rdx, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rdx},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rdi, nullptr),
{ehframe_dwarf_gpr_rdi, ehframe_dwarf_gpr_rdi, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rdi},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rsi, nullptr),
{ehframe_dwarf_gpr_rsi, ehframe_dwarf_gpr_rsi, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_rsi},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rbp, "fp"),
{ehframe_dwarf_gpr_rbp, ehframe_dwarf_gpr_rbp, LLDB_REGNUM_GENERIC_FP,
LLDB_INVALID_REGNUM, gpr_rbp},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rsp, "sp"),
{ehframe_dwarf_gpr_rsp, ehframe_dwarf_gpr_rsp, LLDB_REGNUM_GENERIC_SP,
LLDB_INVALID_REGNUM, gpr_rsp},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r8, nullptr),
{ehframe_dwarf_gpr_r8, ehframe_dwarf_gpr_r8, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r8},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r9, nullptr),
{ehframe_dwarf_gpr_r9, ehframe_dwarf_gpr_r9, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r9},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r10, nullptr),
{ehframe_dwarf_gpr_r10, ehframe_dwarf_gpr_r10, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r10},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r11, nullptr),
{ehframe_dwarf_gpr_r11, ehframe_dwarf_gpr_r11, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r11},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r12, nullptr),
{ehframe_dwarf_gpr_r12, ehframe_dwarf_gpr_r12, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r12},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r13, nullptr),
{ehframe_dwarf_gpr_r13, ehframe_dwarf_gpr_r13, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r13},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r14, nullptr),
{ehframe_dwarf_gpr_r14, ehframe_dwarf_gpr_r14, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r14},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(r15, nullptr),
{ehframe_dwarf_gpr_r15, ehframe_dwarf_gpr_r15, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_r15},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rip, "pc"),
{ehframe_dwarf_gpr_rip, ehframe_dwarf_gpr_rip, LLDB_REGNUM_GENERIC_PC,
LLDB_INVALID_REGNUM, gpr_rip},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(rflags, "flags"),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_REGNUM_GENERIC_FLAGS,
LLDB_INVALID_REGNUM, gpr_rflags},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(cs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_cs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(fs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_fs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(gs, nullptr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, gpr_gs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(fcw),
LLDB_INVALID_REGNUM, fpu_fcw},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(fsw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fsw},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(ftw),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ftw},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(fop),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_fop},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(ip),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ip},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(cs),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_cs},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(dp),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_dp},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(ds),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_ds},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(mxcsr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsr},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_UINT(mxcsrmask),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, fpu_mxcsrmask},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_FPU_VECT(stmm, 0)},
{DEFINE_FPU_VECT(stmm, 1)},
LLDB_INVALID_REGNUM, exc_trapno},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_EXC(err),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_err},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_EXC(faultvaddr),
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, exc_faultvaddr},
nullptr,
nullptr,
+ nullptr,
}};
static size_t k_num_register_infos = std::size(g_register_infos);
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
+ nullptr,
nullptr}) {}
size_t RegisterContextLinux_i386::GetGPRSizeStatic() { return sizeof(GPR); }
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},
nullptr,
+ nullptr,
nullptr}),
m_register_info_p(GetRegisterInfoPtr(target_arch)),
m_register_info_count(GetRegisterInfoCount(target_arch)),
#reg, alt, sizeof(((GPR *)nullptr)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, \
{kind1, kind2, kind3, kind4, lldb_##reg##_i386 }, nullptr, nullptr, \
+ nullptr, \
}
// clang-format off
#reg, alt, sizeof(((GPR *)nullptr)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, \
{kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, nullptr, nullptr, \
+ nullptr, \
}
typedef struct _FPReg {
eEncodingUint, eFormatVectorOfUInt64, \
{dwarf_##reg##_x86_64, dwarf_##reg##_x86_64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##reg##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
// clang-format off
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
dbg_##reg##i }, \
- NULL, NULL,
+ NULL, NULL, NULL,
#define REG_CONTEXT_SIZE \
(sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
sizeof(RegisterInfoPOSIX_arm::EXC))
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
dbg_##reg##i }, \
- NULL, NULL,
+ NULL, NULL, NULL,
#define REG_CONTEXT_SIZE \
(sizeof(RegisterInfoPOSIX_arm64::GPR) + \
sizeof(RegisterInfoPOSIX_arm64::FPU) + \
#name, nullptr, size, FPU_OFFSET(offset), eEncodingIEEE754, eFormatFloat, \
{LLDB_INVALID_REGNUM, dwarf_##name, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, fpu_##name }, \
- g_##qreg##_contained, g_##name##_invalidates, \
+ g_##qreg##_contained, g_##name##_invalidates, nullptr, \
}
#define FPU_QREG(name, offset) \
eFormatVectorOfUInt8, \
{LLDB_INVALID_REGNUM, dwarf_##name, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, fpu_##name }, \
- nullptr, g_##name##_invalidates, \
+ nullptr, g_##name##_invalidates, nullptr, \
}
static RegisterInfo g_register_infos_arm[] = {
gpr_r0},
nullptr,
nullptr,
+ nullptr,
},
{
"r1",
gpr_r1},
nullptr,
nullptr,
+ nullptr,
},
{
"r2",
gpr_r2},
nullptr,
nullptr,
+ nullptr,
},
{
"r3",
gpr_r3},
nullptr,
nullptr,
+ nullptr,
},
{
"r4",
gpr_r4},
nullptr,
nullptr,
+ nullptr,
},
{
"r5",
gpr_r5},
nullptr,
nullptr,
+ nullptr,
},
{
"r6",
gpr_r6},
nullptr,
nullptr,
+ nullptr,
},
{
"r7",
gpr_r7},
nullptr,
nullptr,
+ nullptr,
},
{
"r8",
gpr_r8},
nullptr,
nullptr,
+ nullptr,
},
{
"r9",
gpr_r9},
nullptr,
nullptr,
+ nullptr,
},
{
"r10",
gpr_r10},
nullptr,
nullptr,
+ nullptr,
},
{
"r11",
gpr_r11},
nullptr,
nullptr,
+ nullptr,
},
{
"r12",
gpr_r12},
nullptr,
nullptr,
+ nullptr,
},
{
"sp",
gpr_sp},
nullptr,
nullptr,
+ nullptr,
},
{
"lr",
gpr_lr},
nullptr,
nullptr,
+ nullptr,
},
{
"pc",
gpr_pc},
nullptr,
nullptr,
+ nullptr,
},
{
"cpsr",
LLDB_INVALID_REGNUM, gpr_cpsr},
nullptr,
nullptr,
+ nullptr,
},
FPU_REG(s0, 4, 0, q0),
LLDB_INVALID_REGNUM, fpu_fpscr},
nullptr,
nullptr,
+ nullptr,
},
FPU_REG(d0, 8, 0, q0),
LLDB_INVALID_REGNUM, exc_exception},
nullptr,
nullptr,
+ nullptr,
},
{
"fsr",
LLDB_INVALID_REGNUM, exc_fsr},
nullptr,
nullptr,
+ nullptr,
},
{
"far",
LLDB_INVALID_REGNUM, exc_far},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_DBG(bvr, 0)},
{ \
#reg, nullptr, 8, GPR_OFFSET(gpr_##reg), lldb::eEncodingUint, \
lldb::eFormatHex, GPR64_KIND(reg, generic_kind), nullptr, nullptr, \
+ nullptr, \
}
// Defines a 64-bit general purpose register
{ \
#reg, #alt, 8, GPR_OFFSET(gpr_##reg), lldb::eEncodingUint, \
lldb::eFormatHex, GPR64_KIND(reg, generic_kind), nullptr, nullptr, \
+ nullptr, \
}
// Defines a 32-bit general purpose pseudo register
#wreg, nullptr, 4, \
GPR_OFFSET(gpr_##xreg) + GPR_W_PSEUDO_REG_ENDIAN_OFFSET, \
lldb::eEncodingUint, lldb::eFormatHex, LLDB_KIND(gpr_##wreg), \
- g_contained_##xreg, g_##wreg##_invalidates, \
+ g_contained_##xreg, g_##wreg##_invalidates, nullptr, \
}
// Defines a vector register with 16-byte size
#define DEFINE_VREG(reg) \
{ \
#reg, nullptr, 16, FPU_OFFSET(fpu_##reg - fpu_v0), lldb::eEncodingVector, \
- lldb::eFormatVectorOfUInt8, VREG_KIND(reg), nullptr, nullptr, \
+ lldb::eFormatVectorOfUInt8, VREG_KIND(reg), nullptr, nullptr, nullptr, \
}
// Defines S and D pseudo registers mapping over corresponding vector register
{ \
#reg, nullptr, size, FPU_OFFSET(fpu_##vreg - fpu_v0) + offset, \
lldb::eEncodingIEEE754, lldb::eFormatFloat, LLDB_KIND(fpu_##reg), \
- g_contained_##vreg, g_##reg##_invalidates, \
+ g_contained_##vreg, g_##reg##_invalidates, nullptr, \
}
// Defines miscellaneous status and control registers like cpsr, fpsr etc
{ \
#reg, nullptr, size, TYPE##_OFFSET_NAME(reg), lldb::eEncodingUint, \
lldb::eFormatHex, MISC_##TYPE##_KIND(lldb_kind), nullptr, nullptr, \
+ nullptr, \
}
// Defines pointer authentication mask registers
#define DEFINE_EXTENSION_REG(reg) \
{ \
#reg, nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex, \
- KIND_ALL_INVALID, nullptr, nullptr, \
+ KIND_ALL_INVALID, nullptr, nullptr, nullptr, \
}
static lldb_private::RegisterInfo g_register_infos_arm64_le[] = {
{ \
#vreg, nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
VREG_KIND(vreg), g_contained_##zreg, g_sve_##vreg##_invalidates, \
+ nullptr, \
}
// Defines S and D pseudo registers mapping over corresponding vector register
{ \
#reg, nullptr, size, 0, lldb::eEncodingIEEE754, lldb::eFormatFloat, \
LLDB_KIND(fpu_##reg), g_contained_##zreg, g_sve_##reg##_invalidates, \
+ nullptr, \
}
// Defines a Z vector register with 16-byte default size
#define DEFINE_ZREG(reg) \
{ \
#reg, nullptr, 16, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
- SVE_REG_KIND(reg), nullptr, nullptr, \
+ SVE_REG_KIND(reg), nullptr, nullptr, nullptr, \
}
// Defines a P vector register with 2-byte default size
#define DEFINE_PREG(reg) \
{ \
#reg, nullptr, 2, 0, lldb::eEncodingVector, lldb::eFormatVectorOfUInt8, \
- SVE_REG_KIND(reg), nullptr, nullptr, \
+ SVE_REG_KIND(reg), nullptr, nullptr, nullptr, \
}
static lldb_private::RegisterInfo g_register_infos_arm64_sve_le[] = {
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##reg##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
#name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##name##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
{ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_FP_MM(reg, i, streg) \
LLDB_INVALID_REGNUM, lldb_mm##i##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##streg##_32, \
RegisterContextPOSIX_x86::g_invalidate_##streg##_32, \
+ nullptr, \
}
#define DEFINE_XMM(reg, i) \
reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
{ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
// I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then
{LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_BNDR(reg, i) \
LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
{dwarf_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_BNDC(name, i) \
eFormatVectorOfUInt8, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_DR(reg, i) \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_i386 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_GPR_PSEUDO_16(reg16, reg32) \
lldb_##reg16##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##reg32, \
RegisterContextPOSIX_x86::g_invalidate_##reg32, \
+ nullptr, \
}
#define DEFINE_GPR_PSEUDO_8H(reg8, reg32) \
lldb_##reg8##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##reg32, \
RegisterContextPOSIX_x86::g_invalidate_##reg32, \
+ nullptr, \
}
#define DEFINE_GPR_PSEUDO_8L(reg8, reg32) \
lldb_##reg8##_i386 }, \
RegisterContextPOSIX_x86::g_contained_##reg32, \
RegisterContextPOSIX_x86::g_invalidate_##reg32, \
+ nullptr, \
}
static RegisterInfo g_register_infos_i386[] = {
{ \
#reg, #alt, 8, GPR_OFFSET(gpr_##reg##_loongarch - gpr_first_loongarch), \
lldb::eEncodingUint, lldb::eFormatHex, \
- GPR64_KIND(gpr_##reg, generic_kind), nullptr, nullptr \
+ GPR64_KIND(gpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
}
// Defines a 64-bit floating point register
{ \
#reg, #alt, 8, FPR_OFFSET(fpr_##reg##_loongarch - fpr_first_loongarch), \
lldb::eEncodingUint, lldb::eFormatHex, \
- FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr \
+ FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
}
#define DEFINE_FCC(reg, generic_kind) \
{ \
#reg, nullptr, 1, FCC_OFFSET(fpr_##reg##_loongarch - fpr_fcc0_loongarch), \
lldb::eEncodingUint, lldb::eFormatHex, \
- FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr \
+ FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
}
#define DEFINE_FCSR(reg, generic_kind) \
{ \
#reg, nullptr, 4, FCSR_OFFSET, \
lldb::eEncodingUint, lldb::eFormatHex, \
- FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr \
+ FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
}
// clang-format on
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
gpr_##reg##_mips64 }, \
- NULL, NULL \
+ NULL, NULL, NULL, \
}
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \
FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \
{kind1, kind2, kind3, LLDB_INVALID_REGNUM, \
fpr_##reg##_mips64 }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \
FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, LLDB_INVALID_REGNUM, \
fpr_##reg##_mips64 }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
dwarf_##reg##_powerpc, lldb_kind, \
LLDB_INVALID_REGNUM, \
gpr_##reg##_powerpc }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_FPR(reg, lldb_kind) \
{ \
{dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, \
lldb_kind, LLDB_INVALID_REGNUM, \
fpr_##reg##_powerpc }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_VMX(reg, lldb_kind) \
{ \
{dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, \
lldb_kind, LLDB_INVALID_REGNUM, \
vmx_##reg##_powerpc }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
// General purpose registers. EH_Frame, DWARF,
LLDB_INVALID_REGNUM, fpr_fpscr_powerpc}, \
NULL, \
NULL, \
+ NULL, \
}, \
DEFINE_VMX(v0, LLDB_INVALID_REGNUM), \
DEFINE_VMX(v1, LLDB_INVALID_REGNUM), \
LLDB_INVALID_REGNUM, vmx_vrsave_powerpc}, \
NULL, \
NULL, \
+ NULL, \
}, \
{"vscr", \
NULL, \
LLDB_INVALID_REGNUM, vmx_vscr_powerpc}, \
NULL, \
NULL, \
+ NULL, \
},
static RegisterInfo g_register_infos_powerpc64[] = {
lldb_kind, \
LLDB_INVALID_REGNUM, \
gpr_##reg##_ppc64 }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_FPR_PPC64(reg, alt, lldb_kind) \
{ \
{ppc64_dwarf::dwarf_##reg##_ppc64, \
ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM, \
fpr_##reg##_ppc64 }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_VMX_PPC64(reg, lldb_kind) \
{ \
{ppc64_dwarf::dwarf_##reg##_ppc64, \
ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM, \
vmx_##reg##_ppc64 }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
// General purpose registers.
LLDB_INVALID_REGNUM, fpr_fpscr_ppc64}, \
NULL, \
NULL, \
+ NULL, \
}, \
DEFINE_VMX_PPC64(vr0, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr1, LLDB_INVALID_REGNUM), \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_ppc64}, \
NULL, \
NULL, \
+ NULL, \
}, \
{"vrsave", \
NULL, \
LLDB_INVALID_REGNUM, vmx_vrsave_ppc64}, \
NULL, \
NULL, \
+ NULL, \
}, /* */
typedef struct _GPR_PPC64 {
lldb_kind, \
LLDB_INVALID_REGNUM, \
gpr_##reg##_ppc64le }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_FPR(reg, alt, lldb_kind) \
{ \
{ppc64le_dwarf::dwarf_##reg##_ppc64le, \
ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \
fpr_##reg##_ppc64le }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_VMX(reg, lldb_kind) \
{ \
{ppc64le_dwarf::dwarf_##reg##_ppc64le, \
ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \
vmx_##reg##_ppc64le }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_VSX(reg, lldb_kind) \
{ \
{ppc64le_dwarf::dwarf_##reg##_ppc64le, \
ppc64le_dwarf::dwarf_##reg##_ppc64le, lldb_kind, LLDB_INVALID_REGNUM, \
vsx_##reg##_ppc64le }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
// General purpose registers.
LLDB_INVALID_REGNUM, fpr_fpscr_ppc64le}, \
NULL, \
NULL, \
+ NULL, \
}, \
DEFINE_VMX(vr0, LLDB_INVALID_REGNUM), \
DEFINE_VMX(vr1, LLDB_INVALID_REGNUM), \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_ppc64le}, \
NULL, \
NULL, \
+ NULL, \
}, \
{"vrsave", \
NULL, \
LLDB_INVALID_REGNUM, vmx_vrsave_ppc64le}, \
NULL, \
NULL, \
+ NULL, \
}, \
DEFINE_VSX(vs0, LLDB_INVALID_REGNUM), \
DEFINE_VSX(vs1, LLDB_INVALID_REGNUM), \
{ \
#reg, #alt, 8, GPR_OFFSET(gpr_##reg##_riscv - gpr_first_riscv), \
lldb::eEncodingUint, lldb::eFormatHex, \
- GPR64_KIND(gpr_##reg, generic_kind), nullptr, nullptr \
+ GPR64_KIND(gpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
}
#define DEFINE_FPR64(reg, generic_kind) DEFINE_FPR64_ALT(reg, reg, generic_kind)
{ \
#reg, #alt, size, FPR_OFFSET(fpr_##reg##_riscv - fpr_first_riscv), \
lldb::eEncodingUint, lldb::eFormatHex, \
- FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr \
+ FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr, nullptr, \
}
// clang-format on
#name, alt, size, offset, eEncodingUint, eFormatHex, \
{dwarf_##name##_s390x, dwarf_##name##_s390x, generic, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_GPR_NODWARF(name, size, offset, alt, generic) \
#name, alt, size, offset, eEncodingUint, eFormatHex, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, generic, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_FPR(name, size, offset) \
#name, NULL, size, offset, eEncodingUint, eFormatHex, \
{dwarf_##name##_s390x, dwarf_##name##_s390x, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
#define DEFINE_FPR_NODWARF(name, size, offset) \
#name, NULL, size, offset, eEncodingUint, eFormatHex, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
- NULL, NULL, \
+ NULL, NULL, NULL, \
}
static RegisterInfo g_register_infos_s390x[] = {
GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##reg##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
#name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
{kind1, kind2, kind3, kind4, \
lldb_##name##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_FP_ST(reg, i) \
stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
{dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_FP_MM(reg, i, streg) \
LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##streg##_64, \
RegisterContextPOSIX_x86::g_invalidate_##streg##_64, \
+ nullptr, \
}
#define DEFINE_XMM(reg, i) \
{dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_YMM(reg, i) \
dwarf_##reg##i##h_x86_64, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_BNDR(reg, i) \
dwarf_##reg##i##_x86_64, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_BNDC(name, i) \
LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_DR(reg, i) \
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
lldb_##reg##i##_x86_64 }, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
lldb_##reg32##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
RegisterContextPOSIX_x86::g_invalidate_##reg64, \
+ nullptr, \
}
#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
lldb_##reg16##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
RegisterContextPOSIX_x86::g_invalidate_##reg64, \
+ nullptr, \
}
#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
lldb_##reg8##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
RegisterContextPOSIX_x86::g_invalidate_##reg64, \
+ nullptr, \
}
#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
lldb_##reg8##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
RegisterContextPOSIX_x86::g_invalidate_##reg64, \
+ nullptr \
}
#define DEFINE_FPR_32(name, reg, kind1, kind2, kind3, kind4, reg64) \
{kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, \
RegisterContextPOSIX_x86::g_contained_##reg64, \
RegisterContextPOSIX_x86::g_invalidate_##reg64, \
+ nullptr, \
}
// clang-format off
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- NULL, NULL
+ NULL, NULL, NULL
// Include RegisterInfos_arm to declare our g_register_infos_arm structure.
#define DECLARE_REGISTER_INFOS_ARM_STRUCT
{LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM }, \
- NULL, NULL
+ NULL, NULL, NULL
// Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
#define DECLARE_REGISTER_INFOS_ARM64_STRUCT
LLDB_INVALID_REGNUM, lldb_eax_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ebx, nullptr),
{ehframe_ebx_i386, dwarf_ebx_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_ebx_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ecx, nullptr),
{ehframe_ecx_i386, dwarf_ecx_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_ecx_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(edx, nullptr),
{ehframe_edx_i386, dwarf_edx_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_edx_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(edi, nullptr),
{ehframe_edi_i386, dwarf_edi_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_edi_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(esi, nullptr),
{ehframe_esi_i386, dwarf_esi_i386, LLDB_INVALID_REGNUM,
LLDB_INVALID_REGNUM, lldb_esi_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(ebp, "fp"),
{ehframe_ebp_i386, dwarf_ebp_i386, LLDB_REGNUM_GENERIC_FP,
LLDB_INVALID_REGNUM, lldb_ebp_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(esp, "sp"),
{ehframe_esp_i386, dwarf_esp_i386, LLDB_REGNUM_GENERIC_SP,
LLDB_INVALID_REGNUM, lldb_esp_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR(eip, "pc"),
{ehframe_eip_i386, dwarf_eip_i386, LLDB_REGNUM_GENERIC_PC,
LLDB_INVALID_REGNUM, lldb_eip_i386},
nullptr,
nullptr,
+ nullptr,
},
{DEFINE_GPR_BIN(eflags, "flags"),
{ehframe_eflags_i386, dwarf_eflags_i386, LLDB_REGNUM_GENERIC_FLAGS,
LLDB_INVALID_REGNUM, lldb_eflags_i386},
nullptr,
nullptr,
+ nullptr,
},
};
static size_t k_num_register_infos = std::size(g_register_infos);
{ \
"r" #i, nullptr, 4, OFFSET(r) + i * 4, eEncodingUint, eFormatHex, \
{ehframe_r##i, dwarf_r##i, INV, INV, reg_r##i}, nullptr, nullptr, \
+ nullptr, \
}
#define DEF_R_ARG(i, n) \
"r" #i, "arg" #n, 4, OFFSET(r) + i * 4, eEncodingUint, eFormatHex, \
{ehframe_r##i, dwarf_r##i, LLDB_REGNUM_GENERIC_ARG1 + i, INV, \
reg_r##i}, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEF_D(i) \
{ \
"d" #i, nullptr, 8, OFFSET(d) + i * 8, eEncodingVector, \
eFormatVectorOfUInt8, {dwarf_d##i, dwarf_d##i, INV, INV, reg_d##i}, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEF_S(i) \
{ \
"s" #i, nullptr, 4, OFFSET(s) + i * 4, eEncodingIEEE754, eFormatFloat, \
{dwarf_s##i, dwarf_s##i, INV, INV, reg_s##i}, nullptr, nullptr, \
+ nullptr, \
}
#define DEF_Q(i) \
{ \
"q" #i, nullptr, 16, OFFSET(q) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {dwarf_q##i, dwarf_q##i, INV, INV, reg_q##i}, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
// Zero based LLDB register numbers for this register context
{ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, INV, reg_r7},
nullptr,
nullptr,
+ nullptr,
};
static RegisterInfo g_reg_info_fp = {
{ehframe_r11, dwarf_r11, LLDB_REGNUM_GENERIC_FP, INV, reg_r11},
nullptr,
nullptr,
+ nullptr,
};
// Register info definitions for this register context
{ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, INV, reg_sp},
nullptr,
nullptr,
+ nullptr,
},
{"lr",
"r14",
{ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, INV, reg_lr},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
"r15",
{ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, INV, reg_pc},
nullptr,
nullptr,
+ nullptr,
},
{"cpsr",
"psr",
{ehframe_cpsr, dwarf_cpsr, LLDB_REGNUM_GENERIC_FLAGS, INV, reg_cpsr},
nullptr,
nullptr,
+ nullptr,
},
{"fpscr",
nullptr,
{INV, INV, INV, INV, reg_fpscr},
nullptr,
nullptr,
+ nullptr,
},
DEF_D(0),
DEF_D(1),
{ \
"x" #i, nullptr, 8, OFFSET(x) + i * 8, eEncodingUint, eFormatHex, \
{arm64_dwarf::x##i, arm64_dwarf::x##i, INV, INV, reg_x##i}, \
- nullptr, nullptr, \
+ nullptr, nullptr, nullptr, \
}
#define DEF_W(i) \
{ \
"w" #i, nullptr, 4, OFFSET(x) + i * 8, eEncodingUint, eFormatHex, \
- {INV, INV, INV, INV, reg_w##i}, nullptr, nullptr, \
+ {INV, INV, INV, INV, reg_w##i}, nullptr, nullptr, nullptr, \
}
#define DEF_X_ARG(i, n) \
{ \
"x" #i, "arg" #n, 8, OFFSET(x) + i * 8, eEncodingUint, eFormatHex, \
{arm64_dwarf::x##i, arm64_dwarf::x##i, LLDB_REGNUM_GENERIC_ARG1 + i, \
- INV, reg_x##i}, nullptr, nullptr, \
+ INV, reg_x##i}, nullptr, nullptr, nullptr, \
}
#define DEF_V(i) \
{ \
"v" #i, nullptr, 16, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {arm64_dwarf::v##i, arm64_dwarf::v##i, INV, INV, \
- reg_v##i}, nullptr, nullptr, \
+ reg_v##i}, nullptr, nullptr, nullptr, \
}
#define DEF_D(i) \
{ \
"d" #i, nullptr, 8, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {INV, INV, INV, INV, reg_d##i}, nullptr, \
- nullptr, \
+ nullptr, nullptr, \
}
#define DEF_S(i) \
{ \
"s" #i, nullptr, 4, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {INV, INV, INV, INV, reg_s##i}, nullptr, \
- nullptr, \
+ nullptr, nullptr, \
}
#define DEF_H(i) \
{ \
"h" #i, nullptr, 2, OFFSET(v) + i * 16, eEncodingVector, \
eFormatVectorOfUInt8, {INV, INV, INV, INV, reg_h##i}, nullptr, \
- nullptr, \
+ nullptr, nullptr, \
}
// Zero based LLDB register numbers for this register context
{arm64_dwarf::x29, arm64_dwarf::x29, LLDB_REGNUM_GENERIC_FP, INV, reg_fp},
nullptr,
nullptr,
+ nullptr,
},
{"lr",
"x30",
{arm64_dwarf::x30, arm64_dwarf::x30, LLDB_REGNUM_GENERIC_RA, INV, reg_lr},
nullptr,
nullptr,
+ nullptr,
},
{"sp",
"x31",
{arm64_dwarf::x31, arm64_dwarf::x31, LLDB_REGNUM_GENERIC_SP, INV, reg_sp},
nullptr,
nullptr,
+ nullptr,
},
{"pc",
nullptr,
{arm64_dwarf::pc, arm64_dwarf::pc, LLDB_REGNUM_GENERIC_PC, INV, reg_pc},
nullptr,
nullptr,
+ nullptr,
},
// w0 - w31
DEF_W(0),
{INV, arm64_dwarf::cpsr, LLDB_REGNUM_GENERIC_FLAGS, INV, reg_cpsr},
nullptr,
nullptr,
+ nullptr,
},
{"fpsr",
nullptr,
{INV, INV, INV, INV, reg_fpsr},
nullptr,
nullptr,
+ nullptr,
},
{"fpcr",
nullptr,
{INV, INV, INV, INV, reg_fpcr},
nullptr,
nullptr,
+ nullptr,
},
// v0 - v31
DEF_V(0),
{reg.regnum_ehframe, reg.regnum_dwarf, reg.regnum_generic,
reg.regnum_remote, local_regnum},
// value_regs and invalidate_regs are filled by Finalize()
- nullptr, nullptr
+ nullptr, nullptr, nullptr
};
m_regs.push_back(reg_info);
},
nullptr,
nullptr,
+ nullptr,
};
Info.name = ConstString(Elements["name"]).GetCString();
if (!Info.name)