* mips-dis.c: Update copyright.

	(mips_arch_choices): Add Octeon.
	* mips-opc.c: Update copyright.
	(IOCT): New macro.
	(mips_builtin_opcodes): Add Octeon instruction synciobdma.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9e40103..933409f 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * mips-dis.c: Update copyright.
+       (mips_arch_choices): Add Octeon.
+       * mips-opc.c: Update copyright.
+       (IOCT): New macro.
+       (mips_builtin_opcodes): Add Octeon instruction synciobdma.
+
 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 
        * ppc-opc.c: Support optional L form mtmsr.

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 378847d..a03078a 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1,6 +1,6 @@
 /* Print mips instructions for GDB, the GNU debugger, or for objdump.
    Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2000, 2001, 2002, 2003, 2005, 2007
+   2000, 2001, 2002, 2003, 2005, 2007, 2008
    Free Software Foundation, Inc.
    Contributed by Nobuyuki Hikichi(hikichi@sra.co.jp).
 
@@ -458,6 +458,10 @@ const struct mips_arch_choice mips_arch_choices[] =
     ISA_MIPS3 | INSN_LOONGSON_2F, mips_cp0_names_numeric, 
     NULL, 0, mips_hwr_names_numeric },
 
+  { "octeon",   1, bfd_mach_mips_octeon, CPU_OCTEON,
+    ISA_MIPS64R2 | INSN_OCTEON, mips_cp0_names_numeric, NULL, 0,
+    mips_hwr_names_numeric },
+
   /* This entry, mips16, is here only for ISA/processor selection; do
      not print its name.  */
   { "",                1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16,

diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 746763b..b0f9d7e 100644 (file)
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -1,6 +1,6 @@
 /* mips-opc.c -- MIPS opcode list.
    Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
-   2003, 2004, 2005, 2007  Free Software Foundation, Inc.
+   2003, 2004, 2005, 2007, 2008  Free Software Foundation, Inc.
    Contributed by Ralph Campbell and OSF
    Commented and modified by Ian Lance Taylor, Cygnus Support
    Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
@@ -121,6 +121,7 @@
 #define N5     (INSN_5400 | INSN_5500)
 #define N54    INSN_5400
 #define N55    INSN_5500
+#define IOCT   INSN_OCTEON
 
 #define G1      (T3             \
                  )
@@ -1295,6 +1296,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"sync.p",  "",                0x0000040f, 0xffffffff, INSN_SYNC,              0,              I2      },
 {"sync.l",  "",                0x0000000f, 0xffffffff, INSN_SYNC,              0,              I2      },
 {"synci",   "o(b)",    0x041f0000, 0xfc1f0000, SM|RD_b,                0,              I33     },
+{"synciobdma", "",     0x0000008f, 0xffffffff, INSN_SYNC,              0,              IOCT    },
 {"syscall", "",                0x0000000c, 0xffffffff, TRAP,                   0,              I1      },
 {"syscall", "B",       0x0000000c, 0xfc00003f, TRAP,                   0,              I1      },
 {"teqi",    "s,j",     0x040c0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },