drm/msm: Fix duplicate gpu node in icc summary
authorAkhil P Oommen <akhilpo@codeaurora.org>
Wed, 28 Oct 2020 14:35:11 +0000 (20:05 +0530)
committerRob Clark <robdclark@chromium.org>
Wed, 4 Nov 2020 16:26:26 +0000 (08:26 -0800)
The dev_pm_opp_of_add_table() api initializes the icc nodes for gpu
indirectly. So we can avoid using of_icc_get() api in the common
probe path. To improve this, move of_icc_get() to target specific code
where it is required.

This patch helps to fix duplicate gpu node listed in the interconnect
summary from the debugfs.

Signed-off-by: Akhil P Oommen <akhilpo@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/adreno/a3xx_gpu.c
drivers/gpu/drm/msm/adreno/a4xx_gpu.c
drivers/gpu/drm/msm/adreno/adreno_gpu.c

index f29c77d..93da668 100644 (file)
@@ -519,6 +519,8 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
        struct msm_gpu *gpu;
        struct msm_drm_private *priv = dev->dev_private;
        struct platform_device *pdev = priv->gpu_pdev;
+       struct icc_path *ocmem_icc_path;
+       struct icc_path *icc_path;
        int ret;
 
        if (!pdev) {
@@ -566,13 +568,28 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
                goto fail;
        }
 
+       icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
+       ret = IS_ERR(icc_path);
+       if (ret)
+               goto fail;
+
+       ocmem_icc_path = devm_of_icc_get(&pdev->dev, "ocmem");
+       ret = IS_ERR(ocmem_icc_path);
+       if (ret) {
+               /* allow -ENODATA, ocmem icc is optional */
+               if (ret != -ENODATA)
+                       goto fail;
+               ocmem_icc_path = NULL;
+       }
+
+
        /*
         * Set the ICC path to maximum speed for now by multiplying the fastest
         * frequency by the bus width (8). We'll want to scale this later on to
         * improve battery life.
         */
-       icc_set_bw(gpu->icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
-       icc_set_bw(gpu->ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
 
        return gpu;
 
index 2b93b33..c0be3a0 100644 (file)
@@ -648,6 +648,8 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
        struct msm_gpu *gpu;
        struct msm_drm_private *priv = dev->dev_private;
        struct platform_device *pdev = priv->gpu_pdev;
+       struct icc_path *ocmem_icc_path;
+       struct icc_path *icc_path;
        int ret;
 
        if (!pdev) {
@@ -694,13 +696,27 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
                goto fail;
        }
 
+       icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
+       ret = IS_ERR(icc_path);
+       if (ret)
+               goto fail;
+
+       ocmem_icc_path = devm_of_icc_get(&pdev->dev, "ocmem");
+       ret = IS_ERR(ocmem_icc_path);
+       if (ret) {
+               /* allow -ENODATA, ocmem icc is optional */
+               if (ret != -ENODATA)
+                       goto fail;
+               ocmem_icc_path = NULL;
+       }
+
        /*
         * Set the ICC path to maximum speed for now by multiplying the fastest
         * frequency by the bus width (8). We'll want to scale this later on to
         * improve battery life.
         */
-       icc_set_bw(gpu->icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
-       icc_set_bw(gpu->ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
 
        return gpu;
 
index 458b5b2..f21561d 100644 (file)
@@ -899,7 +899,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
        struct adreno_platform_config *config = dev->platform_data;
        struct msm_gpu_config adreno_gpu_config  = { 0 };
        struct msm_gpu *gpu = &adreno_gpu->base;
-       int ret;
 
        adreno_gpu->funcs = funcs;
        adreno_gpu->info = adreno_info(config->rev);
@@ -918,37 +917,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
        pm_runtime_use_autosuspend(dev);
        pm_runtime_enable(dev);
 
-       ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
+       return msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
                        adreno_gpu->info->name, &adreno_gpu_config);
-       if (ret)
-               return ret;
-
-       /*
-        * The legacy case, before "interconnect-names", only has a
-        * single interconnect path which is equivalent to "gfx-mem"
-        */
-       if (!of_find_property(dev->of_node, "interconnect-names", NULL)) {
-               gpu->icc_path = of_icc_get(dev, NULL);
-       } else {
-               gpu->icc_path = of_icc_get(dev, "gfx-mem");
-               gpu->ocmem_icc_path = of_icc_get(dev, "ocmem");
-       }
-
-       if (IS_ERR(gpu->icc_path)) {
-               ret = PTR_ERR(gpu->icc_path);
-               gpu->icc_path = NULL;
-               return ret;
-       }
-
-       if (IS_ERR(gpu->ocmem_icc_path)) {
-               ret = PTR_ERR(gpu->ocmem_icc_path);
-               gpu->ocmem_icc_path = NULL;
-               /* allow -ENODATA, ocmem icc is optional */
-               if (ret != -ENODATA)
-                       return ret;
-       }
-
-       return 0;
 }
 
 void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)