tvafe: optimize avin ntsc_m, pal_m and secam display [1/1]

PD#SWPL-12091

Problem:
COLOR BAR+CROSS+DOT pattern is not good under avin ntsc_m

Solution:
update cvd 0xb2, 0xb5 reg for ntsc_m, pal_m, secam

Verify:
x301

Change-Id: I1610165689321d7cc60b883a4e44e86a6c352f18
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>

diff --git a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c
index e1e7efd..0a90607 100644 (file)
--- a/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c
+++ b/drivers/amlogic/media/vin/tvin/tvafe/tvafe_cvd.c
@@ -478,9 +478,17 @@ static void tvafe_cvd2_write_mode_reg(struct tvafe_cvd2_s *cvd2,
 
        } else {
                W_APB_REG(CVD2_VSYNC_NO_SIGNAL_THRESHOLD, 0xf0);
-               if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_I)
+               if (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_I) {
                                /*add for chroma state adjust dynamicly*/
                        W_APB_REG(CVD2_CHROMA_LOOPFILTER_STATE, cvd_reg8a);
+               }
+               if ((cvd2->config_fmt == TVIN_SIG_FMT_CVBS_NTSC_M) ||
+                       (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_PAL_M) ||
+                       (cvd2->config_fmt == TVIN_SIG_FMT_CVBS_SECAM)) {
+                       W_APB_BIT(CVD2_REG_B2, 1,
+                       ADAPTIVE_CHROMA_MODE_BIT, ADAPTIVE_CHROMA_MODE_WID);
+                       W_APB_REG(CVD2_CHROMA_EDGE_ENHANCEMENT, 0x22);
+               }
        }
 #ifdef TVAFE_CVD2_CC_ENABLE
        W_APB_REG(CVD2_VBI_DATA_TYPE_LINE21, 0x00000011);