clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
authorBiju Das <biju.das.jz@bp.renesas.com>
Thu, 4 Aug 2022 08:26:05 +0000 (09:26 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 22 Aug 2022 07:47:36 +0000 (09:47 +0200)
Add conditional compilation for struct r9a07g044_cpg_info, so the
compiler won't allocate any memory for this variable in case
CONFIG_CLK_R9A07G044 is disabled.

Reported-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220804082605.157269-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a07g044-cpg.c

index fd7c4ee..02a4fc4 100644 (file)
@@ -414,6 +414,7 @@ static const unsigned int r9a07g044_crit_mod_clks[] __initconst = {
        MOD_CLK_BASE + R9A07G044_DMAC_ACLK,
 };
 
+#ifdef CONFIG_CLK_R9A07G044
 const struct rzg2l_cpg_info r9a07g044_cpg_info = {
        /* Core Clocks */
        .core_clks = core_clks.common,
@@ -436,6 +437,7 @@ const struct rzg2l_cpg_info r9a07g044_cpg_info = {
 
        .has_clk_mon_regs = true,
 };
+#endif
 
 #ifdef CONFIG_CLK_R9A07G054
 const struct rzg2l_cpg_info r9a07g054_cpg_info = {