I don't know how to expose this in a test. There are ARM / AArch64
sched classes that include zero latency instructions, but I'm not
seeing sched info printed for those targets. X86 will almost
certainly have these soon (see PR36671), but no model has
'let Latency = 0' currently.
llvm-svn: 327518
}
static std::string createSchedInfoStr(unsigned Latency,
- Optional<double> RThroughput) {
+ Optional<double> RThroughput) {
static const char *SchedPrefix = " sched: [";
std::string Comment;
raw_string_ostream CS(Comment);
- if (Latency > 0 && RThroughput.hasValue())
+ if (RThroughput.hasValue())
CS << SchedPrefix << Latency << format(":%2.2f", RThroughput.getValue())
<< "]";
- else if (Latency > 0)
+ else
CS << SchedPrefix << Latency << ":?]";
- else if (RThroughput.hasValue())
- CS << SchedPrefix << "?:" << RThroughput.getValue() << "]";
CS.flush();
return Comment;
}