{ "vec4_seq", IR_SEQ, 1, 2 },
{ "vec4_sge", IR_SGE, 1, 2 },
{ "vec4_sgt", IR_SGT, 1, 2 },
+ { "vec4_sle", IR_SLE, 1, 2 },
+ { "vec4_slt", IR_SLT, 1, 2 },
/* vec4 unary */
{ "vec4_floor", IR_FLOOR, 1, 1 },
{ "vec4_frac", IR_FRAC, 1, 1 },
/**
* Produce inline code for a call to an assembly instruction.
+ * XXX Note: children are passed as asm args in-order, not by name!
*/
static slang_operation *
slang_inline_asm_function(slang_assemble_ctx *A,
_slang_gen_operation(A, &oper->children[0]),
_slang_gen_operation(A, &oper->children[1]));
case SLANG_OPER_LESS:
- /* child[0] < child[1] ----> child[1] > child[0] */
- return new_node2(IR_SGT,
- _slang_gen_operation(A, &oper->children[1]),
- _slang_gen_operation(A, &oper->children[0]));
+ return new_node2(IR_SLT,
+ _slang_gen_operation(A, &oper->children[0]),
+ _slang_gen_operation(A, &oper->children[1]));
case SLANG_OPER_GREATEREQUAL:
return new_node2(IR_SGE,
_slang_gen_operation(A, &oper->children[0]),
_slang_gen_operation(A, &oper->children[1]));
case SLANG_OPER_LESSEQUAL:
- /* child[0] <= child[1] ----> child[1] >= child[0] */
- return new_node2(IR_SGE,
- _slang_gen_operation(A, &oper->children[1]),
- _slang_gen_operation(A, &oper->children[0]));
+ return new_node2(IR_SLE,
+ _slang_gen_operation(A, &oper->children[0]),
+ _slang_gen_operation(A, &oper->children[1]));
case SLANG_OPER_ADD:
{
slang_ir_node *n;
{ IR_SNEQUAL, "IR_SNEQUAL", OPCODE_SNE, 4, 2 },
{ IR_SGE, "IR_SGE", OPCODE_SGE, 4, 2 },
{ IR_SGT, "IR_SGT", OPCODE_SGT, 4, 2 },
+ { IR_SLE, "IR_SLE", OPCODE_SLE, 4, 2 },
+ { IR_SLT, "IR_SLT", OPCODE_SLT, 4, 2 },
{ IR_POW, "IR_POW", OPCODE_POW, 1, 2 },
/* unary ops */
{ IR_I_TO_F, "IR_I_TO_F", OPCODE_NOP, 1, 1 },
case IR_SNEQUAL:
case IR_SGE:
case IR_SGT:
+ case IR_SLE:
+ case IR_SLT:
case IR_POW:
case IR_EXP:
case IR_EXP2: