MIPS: don't select DMA_MAYBE_COHERENT from DMA_PERDEV_COHERENT
authorChristoph Hellwig <hch@lst.de>
Thu, 16 Aug 2018 13:47:53 +0000 (16:47 +0300)
committerChristoph Hellwig <hch@lst.de>
Thu, 20 Sep 2018 07:01:14 +0000 (09:01 +0200)
While both option select a form of conditional dma coherence they don't
actually share any code in the implementation, so untangle them.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Paul Burton <paul.burton@mips.com>
arch/mips/Kconfig
arch/mips/kernel/setup.c
arch/mips/mm/c-r4k.c

index 3551199..0b25180 100644 (file)
@@ -1111,7 +1111,7 @@ config DMA_MAYBE_COHERENT
 
 config DMA_PERDEV_COHERENT
        bool
-       select DMA_MAYBE_COHERENT
+       select DMA_NONCOHERENT
 
 config DMA_NONCOHERENT
        bool
index c71d1eb..6d840a4 100644 (file)
@@ -1067,7 +1067,7 @@ static int __init debugfs_mips(void)
 arch_initcall(debugfs_mips);
 #endif
 
-#if defined(CONFIG_DMA_MAYBE_COHERENT) && !defined(CONFIG_DMA_PERDEV_COHERENT)
+#ifdef CONFIG_DMA_MAYBE_COHERENT
 /* User defined DMA coherency from command line. */
 enum coherent_io_user_state coherentio = IO_COHERENCE_DEFAULT;
 EXPORT_SYMBOL_GPL(coherentio);
index a9ef057..05bd777 100644 (file)
@@ -1955,22 +1955,21 @@ void r4k_cache_init(void)
        __flush_icache_user_range       = r4k_flush_icache_user_range;
        __local_flush_icache_user_range = local_r4k_flush_icache_user_range;
 
-#if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_DMA_MAYBE_COHERENT)
-# if defined(CONFIG_DMA_PERDEV_COHERENT)
-       if (0) {
-# else
-       if ((coherentio == IO_COHERENCE_ENABLED) ||
-           ((coherentio == IO_COHERENCE_DEFAULT) && hw_coherentio)) {
-# endif
+#ifdef CONFIG_DMA_NONCOHERENT
+#ifdef CONFIG_DMA_MAYBE_COHERENT
+       if (coherentio == IO_COHERENCE_ENABLED ||
+           (coherentio == IO_COHERENCE_DEFAULT && hw_coherentio)) {
                _dma_cache_wback_inv    = (void *)cache_noop;
                _dma_cache_wback        = (void *)cache_noop;
                _dma_cache_inv          = (void *)cache_noop;
-       } else {
+       } else
+#endif /* CONFIG_DMA_MAYBE_COHERENT */
+       {
                _dma_cache_wback_inv    = r4k_dma_cache_wback_inv;
                _dma_cache_wback        = r4k_dma_cache_wback_inv;
                _dma_cache_inv          = r4k_dma_cache_inv;
        }
-#endif
+#endif /* CONFIG_DMA_NONCOHERENT */
 
        build_clear_page();
        build_copy_page();