spi: stm32: ignore Rx queue not empty in stm32f4 Tx only mode

STM32F4_SPI_SR_RXNE and STM32F4_SPI_SR_OVR are distinct bits in the same
status register.  ~STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE is thus
equal to ~STM32F4_SPI_SR_OVR.

The original intention was likely for transmission-only transfers to
ignore interrupts both for when the Rx queue has bytes (RXNE) as well
as when these bytes haven't been read in time (OVR).

Fix the typo by adding the missing parenthesis.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.kernel.org/r/20220201115142.3999860-1-a.fatoum@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c
index 7fc2450..a6adc20 100644 (file)
--- a/drivers/spi/spi-stm32.c
+++ b/drivers/spi/spi-stm32.c
@@ -763,7 +763,7 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void *dev_id)
        if (!spi->cur_usedma && (spi->cur_comm == SPI_SIMPLEX_TX ||
                                 spi->cur_comm == SPI_3WIRE_TX)) {
                /* OVR flag shouldn't be handled for TX only mode */
-               sr &= ~STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE;
+               sr &= ~(STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE);
                mask |= STM32F4_SPI_SR_TXE;
        }