#define MXC_CPU_MX7S 0x71 /* dummy ID */
#define MXC_CPU_MX7D 0x72
#define MXC_CPU_MX8MQ 0x82
+#define MXC_CPU_IMX8QXP 0x92 /* dummy ID */
#define MXC_CPU_MX7ULP 0xE1 /* Temporally hard code */
#define MXC_CPU_VF610 0xF6 /* dummy ID */
#define MXC_SOC_MX6 0x60
#define MXC_SOC_MX7 0x70
#define MXC_SOC_MX8M 0x80
+#define MXC_SOC_IMX8 0x90 /* dummy */
#define MXC_SOC_MX7ULP 0xE0 /* dummy */
#define CHIP_REV_1_0 0x10
#define CHIP_REV_2_5 0x25
#define CHIP_REV_3_0 0x30
+#define CHIP_REV_A 0x0
+#define CHIP_REV_B 0x1
+
#define BOARD_REV_1_0 0x0
#define BOARD_REV_2_0 0x1
#define BOARD_VER_OFFSET 0x8
#define is_mx6() (is_soc_type(MXC_SOC_MX6))
#define is_mx7() (is_soc_type(MXC_SOC_MX7))
#define is_mx8m() (is_soc_type(MXC_SOC_MX8M))
+#define is_imx8() (is_soc_type(MXC_SOC_IMX8))
#define is_mx6dqp() (is_cpu_type(MXC_CPU_MX6QP) || is_cpu_type(MXC_CPU_MX6DP))
#define is_mx6dq() (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D))
#define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
+#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
+
#ifdef CONFIG_MX6
#define IMX6_SRC_GPR10_BMODE BIT(28)