/* SSE4.1 */
BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendpd, "__builtin_ia32_blendpd", IX86_BUILTIN_BLENDPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendps, "__builtin_ia32_blendps", IX86_BUILTIN_BLENDPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
-BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
+BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_blendvpd, "__builtin_ia32_blendvpd", IX86_BUILTIN_BLENDVPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_V2DF)
BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_nothing, "__builtin_ia32_blendvps", IX86_BUILTIN_BLENDVPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_V4SF)
BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dppd, "__builtin_ia32_dppd", IX86_BUILTIN_DPPD, UNKNOWN, (int) V2DF_FTYPE_V2DF_V2DF_INT)
BDESC (OPTION_MASK_ISA_SSE4_1, 0, CODE_FOR_sse4_1_dpps, "__builtin_ia32_dpps", IX86_BUILTIN_DPPS, UNKNOWN, (int) V4SF_FTYPE_V4SF_V4SF_INT)
}
break;
+ case IX86_BUILTIN_BLENDVPD:
+ /* blendvpd is under sse4.1 but pcmpgtq is under sse4.2,
+ w/o sse4.2, it's veclowered to scalar operations and
+ not combined back. */
+ if (!TARGET_SSE4_2)
+ break;
+ /* FALLTHRU. */
case IX86_BUILTIN_PBLENDVB128:
case IX86_BUILTIN_PBLENDVB256:
case IX86_BUILTIN_BLENDVPS:
- case IX86_BUILTIN_BLENDVPD:
case IX86_BUILTIN_BLENDVPS256:
case IX86_BUILTIN_BLENDVPD256:
gcc_assert (n_args == 3);
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-msse4.1 -O2 -mno-sse4.2" } */
+/* { dg-final { scan-assembler-times {(?n)blendvpd[ \t]+%xmm[0-9]+} 1 } } */
+
+#include <immintrin.h>
+
+__m128d
+foo (__m128d a, __m128d b, __m128d c)
+{
+ return _mm_blendv_pd (a, b, c);
+}