pinctrl: cherryview: Use GENMASK() consistently

Use GENMASK() macro for all definitions where it's appropriate.
No functional change intended.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>

diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
index fa81f3c..53f2775 100644 (file)
--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -35,18 +35,18 @@
 
 #define CHV_PADCTRL0                   0x000
 #define CHV_PADCTRL0_INTSEL_SHIFT      28
-#define CHV_PADCTRL0_INTSEL_MASK       (0xf << CHV_PADCTRL0_INTSEL_SHIFT)
+#define CHV_PADCTRL0_INTSEL_MASK       GENMASK(31, 28)
 #define CHV_PADCTRL0_TERM_UP           BIT(23)
 #define CHV_PADCTRL0_TERM_SHIFT                20
-#define CHV_PADCTRL0_TERM_MASK         (7 << CHV_PADCTRL0_TERM_SHIFT)
+#define CHV_PADCTRL0_TERM_MASK         GENMASK(22, 20)
 #define CHV_PADCTRL0_TERM_20K          1
 #define CHV_PADCTRL0_TERM_5K           2
 #define CHV_PADCTRL0_TERM_1K           4
 #define CHV_PADCTRL0_PMODE_SHIFT       16
-#define CHV_PADCTRL0_PMODE_MASK                (0xf << CHV_PADCTRL0_PMODE_SHIFT)
+#define CHV_PADCTRL0_PMODE_MASK                GENMASK(19, 16)
 #define CHV_PADCTRL0_GPIOEN            BIT(15)
 #define CHV_PADCTRL0_GPIOCFG_SHIFT     8
-#define CHV_PADCTRL0_GPIOCFG_MASK      (7 << CHV_PADCTRL0_GPIOCFG_SHIFT)
+#define CHV_PADCTRL0_GPIOCFG_MASK      GENMASK(10, 8)
 #define CHV_PADCTRL0_GPIOCFG_GPIO      0
 #define CHV_PADCTRL0_GPIOCFG_GPO       1
 #define CHV_PADCTRL0_GPIOCFG_GPI       2
@@ -57,11 +57,11 @@
 #define CHV_PADCTRL1                   0x004
 #define CHV_PADCTRL1_CFGLOCK           BIT(31)
 #define CHV_PADCTRL1_INVRXTX_SHIFT     4
-#define CHV_PADCTRL1_INVRXTX_MASK      (0xf << CHV_PADCTRL1_INVRXTX_SHIFT)
-#define CHV_PADCTRL1_INVRXTX_TXENABLE  (2 << CHV_PADCTRL1_INVRXTX_SHIFT)
+#define CHV_PADCTRL1_INVRXTX_MASK      GENMASK(7, 4)
+#define CHV_PADCTRL1_INVRXTX_RXDATA    BIT(6)
+#define CHV_PADCTRL1_INVRXTX_TXENABLE  BIT(5)
 #define CHV_PADCTRL1_ODEN              BIT(3)
-#define CHV_PADCTRL1_INVRXTX_RXDATA    (4 << CHV_PADCTRL1_INVRXTX_SHIFT)
-#define CHV_PADCTRL1_INTWAKECFG_MASK   7
+#define CHV_PADCTRL1_INTWAKECFG_MASK   GENMASK(2, 0)
 #define CHV_PADCTRL1_INTWAKECFG_FALLING        1
 #define CHV_PADCTRL1_INTWAKECFG_RISING 2
 #define CHV_PADCTRL1_INTWAKECFG_BOTH   3