PD#SWPL-2580
Problem:
The vd1 postblend bit in vpp misc is overwriten.
Solution:
add more check for vd1 postblend bit in vsync
Verify:
verify by p212
Change-Id: I367e920c13764af41446d7d759aaf8388fb08722
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>
video_enabled = video_status_saved;
}
+ if (!video_enabled &&
+ (vpp_misc_set & VPP_VD1_POSTBLEND))
+ vpp_misc_set &= ~(VPP_VD1_PREBLEND |
+ VPP_VD2_PREBLEND |
+ VPP_VD2_POSTBLEND |
+ VPP_VD1_POSTBLEND |
+ VPP_PREBLEND_EN);
+
if (!legacy_vpp) {
u32 set_value = 0;